- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365394 > S29GL128N10TAIV13 (SPANSION LLC) 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology PDF資料下載
參數(shù)資料
| 型號： | S29GL128N10TAIV13 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| 中文描述： | 8M X 16 FLASH 3V PROM, 100 ns, PDSO56 |
| 封裝： | MO-142BEC, TSOP-56 |
| 文件頁數(shù)： | 62/100頁 |
| 文件大?。?/td> | 952K |
| 代理商： | S29GL128N10TAIV13 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁當(dāng)前第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁
60
S29GL-N MirrorBit Flash Family
S29GL-N_00_B3 October 13, 2006
D a t a S h e e t
Once the Password is written and verified, the Password Protection Mode Lock Bit in the
Lock
Register
must be programmed in order to prevent verification. The Password Program com-
mand is only capable of programming
0
s. Programming a
1
after a cell is programmed as a
0
results in a time-out by the Embedded Program Algorithm
TM
with the cell remaining as a
0
.
The password is all F’s when shipped from the factory. All 64-bit password combinations are
valid as a password.
The Password Read command is used to verify the Password. The Password is verifiable only
when the Password Protection Mode Lock Bit in the
Lock Register
is not programmed. If the
Password Protection Mode Lock Bit in the
Lock Register
is programmed and the user attempts
to read the Password, the device always drives all F’s onto the DQ databus.
The lower two address bits (A1–A0) for word mode and (A1–A-1) for by byte mode are valid
during the Password Read, Password Program, and Password Unlock commands.
W riting a
1
to any other address bits ( A
MAX
-A2) aborts the Passw ord Read and Passw ord Pro-
gram commands.
The Password Unlock command is used to clear the PPB Lock Bit to the
unfreeze state
so that
the PPB bits can be modified. The exact password must be entered in order for the unlocking
function to occur. This 64-bit Password Unlock command sequence takes at least 2 μs to pro-
cess each time to prevent a hacker from running through the all 64-bit combinations in an
attempt to correctly match the password. If another password unlock is issued before the
64-bit password check execution window is completed, the command is ignored. If the wrong
address or data is given during password unlock command cycle, the device may enter the
write- to- buffer abort state. I n order to ex it the write- to- abort state, the
write-to-buffer-abort-reset command must be given. Otherwise the device hangs.
The Password Unlock function is accomplished by writing Password Unlock command and data
to the device to perform the clearing of the PPB Lock Bit to the
unfreeze state
. The password
is 64 bits long. A1 and A0 are used for matching in word mode and A1, A0, A-1 in byte mode.
Writing the Password Unlock command does not need to be address order specific. An exam-
ple sequence is starting with the lower address A1-A0= 00, followed by A1-A0= 01, A1-A0= 10,
and A1-A0= 11 if the device is configured to operate in word mode.
Approximately 2 μs is required for unlocking the device after the valid 64-bit password is
given to the device. It is the responsibility of the microprocessor to keep track of the entering
the portions of the 64-bit password with the Password Unlock command, the order, and when
to read the PPB Lock bit to confirm successful password unlock. In order to re-lock the device
into the Password Protection Mode, the PPB Lock Bit Set command can be re-issued.
Note:
The Password Protection Command Set Exit command must be issued after the exe-
cution of the commands listed previously to reset the device to read mode. Otherwise the
device hangs.
Note:
Issuing the Password Protection Command Set Exit command re-enables reads and
writes for the main memory.
Non-Volatile Sector Protection Command Set Definitions
The Non-Volatile Sector Protection Command Set permits the user to program the Persistent
Protection Bits (PPB bits), erase all of the Persistent Protection Bits (PPB bits), and read the
logic state of the Persistent Protection Bits (PPB bits).
The
Non-Volatile Sector Protection Command Set Entry
command sequence must be is-
sued prior to any of the commands listed following to enable proper command execution.
Note that issuing the
Non-Volatile Sector Protection Command Set Entry
command
dis-
ables reads and w rites for the main memory
.
PPB Program Command
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29GL128N10TAIV20 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| S29GL128N10TAIV22 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| S29GL128N10TAIV23 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| S29GL128N10TFI010 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| S29GL128N10TFI012 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL128N10TF101 | 制造商:Spansion 功能描述: |
| S29GL128N10TFI010 | 功能描述:IC FLASH 制造商:cypress semiconductor corp 系列:GL-N 包裝:托盤 零件狀態(tài):在售 存儲器類型:非易失 存儲器格式:閃存 技術(shù):FLASH - NOR 存儲容量:128Mb （16M x 8，8M x 16） 寫周期時間 - 字，頁:100ns 訪問時間:100ns 存儲器接口:并聯(lián) 電壓 - 電源:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C（TA） 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商器件封裝:56-TSOP 標準包裝:91 |
| S29GL128N10TFI020 | 制造商:Spansion 功能描述:S29GL128N10TFI020 制造商:Spansion 功能描述:Flash - NOR IC |
| S29GL128N11FAI020 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 128M-Bit 16M x 8/8M x 16 110ns 64-Pin Fortified BGA Tray |
| S29GL128N11FAI023 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 128M-Bit 16M x 8/8M x 16 110ns 64-Pin Fortified BGA T/R |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。