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參數(shù)資料
| 型號： | S29GL128N10TAIV13 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| 中文描述： | 8M X 16 FLASH 3V PROM, 100 ns, PDSO56 |
| 封裝： | MO-142BEC, TSOP-56 |
| 文件頁數(shù)： | 55/100頁 |
| 文件大?。?/td> | 952K |
| 代理商： | S29GL128N10TAIV13 |
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S29GL-N_00_B3 October 13, 2006
S29GL-N MirrorBit Flash Family
53
D a t a S h e e t
Once the specified number of write buffer locations have been loaded, the system must then
write the Program Buffer to Flash command at the sector address. Any other address and data
combination aborts the Write Buffer Programming operation. The device then begins pro-
gramming. Data polling should be used while monitoring the last address location loaded into
the write buffer. DQ7, DQ6, DQ5, and DQ1 should be monitored to determine the device sta-
tus during Write Buffer Programming.
The write-buffer programming operation can be suspended using the standard program sus-
pend/resume commands. Upon successful completion of the Write Buffer Programming
operation, the device is ready to execute the next command.
The Write Buffer Programming Sequence can be aborted in the following ways:
Load a value that is greater than the page buffer size during the Number of Locations to
Program step.
Write to an address in a sector different than the one specified during the
Write-Buffer-Load command.
Write an Address/Data pair to a different write-buffer-page than the one selected by the
Starting Address during the write buffer data loading stage of the operation.
Write data other than the Confirm Command after the specified number of data load cy-
cles.
The abort condition is indicated by DQ1 = 1, DQ7 = DATA# (for the last address location
loaded), DQ6 = toggle, and DQ5= 0. A Write-to-Buffer-Abort Reset command sequence must
be written to reset the device for the next operation.
Write buffer programming is allowed in any sequence. Note that the Secured Silicon sector,
autoselect, and CFI functions are unavailable when a program operation is in progress. This
flash device is capable of handling multiple write buffer programming operations on the same
write buffer address range without intervening erases.
Any bit in a w rite buffer address
range cannot be programmed from
0
back to a
1
.
Attempting to do so may cause the
device to set DQ5 = 1, or cause the DQ7 and DQ6 status bits to indicate the operation was
successful. However, a succeeding read shows that the data is still
0
. Only erase operations
can convert a
0
to a
1
.
Accelerated Program
The device offers accelerated program operations through the WP#/ACC pin. When the sys-
tem asserts V
HH
on the WP#/ACC pin, the device automatically enters the Unlock Bypass
mode. The system may then write the two-cycle Unlock Bypass program command sequence.
The device uses the higher voltage on the WP#/ACC pin to accelerate the operation.
Note that
the
WP#/
ACC pin must not be at V
HH
for operations other than accelerated programming, or
device damage may result. WP# has an internal pullup; when unconnected, WP# is at V
IH
.
Figure 2, on page 55
illustrates the algorithm for the program operation. Refer to the Erase
and Program Operations subsection of the
“AC Characteristics” section on page 77
for param-
eters, and
Figure 14, on page 81
for timing diagrams.
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