參數(shù)資料
型號(hào): S29GL128N10TAIV13
廠商: SPANSION LLC
元件分類: PROM
英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology
中文描述: 8M X 16 FLASH 3V PROM, 100 ns, PDSO56
封裝: MO-142BEC, TSOP-56
文件頁數(shù): 61/100頁
文件大?。?/td> 952K
代理商: S29GL128N10TAIV13
S29GL-N_00_B3 October 13, 2006
S29GL-N MirrorBit Flash Family
59
D a t a S h e e t
In the erase-suspend-read mode, the system can also issue the autoselect command se-
quence. Refer to the
Autoselect Mode on page 37
section and
Autoselect Command
Sequence on page 51
for details.
To resume the sector erase operation, the system must write the Erase Resume command.
The address of the erase-suspended sector is required when writing this command. Further
writes of the Resume command are ignored. Another Erase Suspend command can be written
after the chip has resumed erasing. It is important to allow an interval of at least 5 ms be-
tween Erase Resume and Erase Suspend.
Lock Register Command Set Definitions
The Lock Register Command Set permits the user to one-time program the Secured Silicon
Sector Protection Bit, Persistent Protection Mode Lock Bit, and Password Protection Mode Lock
Bit. The Lock Register bits are all readable after an initial access delay.
The
Lock Register Command Set Entry
command sequence must be issued prior to any
of the following commands listed, to enable proper command execution.
Note that issuing the
Lock Register Command Set Entry
command
disables reads and
w rites for the flash memory
.
Lock Register Program Command
Lock Register Read Command
The
Lock Register Command Set Exit
command must be issued after the execution of the
commands to reset the device to read mode. Otherwise the device hangs. If this happens,
the flash device must be reset. Please refer to RESET# for more information. It is important
to note that the device is in either Persistent Protection mode or Password Protection mode
depending on the mode selected prior to the device hang.
For either the Secured Silicon Sector to be locked, or the device to be permanently set to the
Persistent Protection Mode or the Password Protection Mode, the associated Lock Register bits
must be programmed. Note that only the Persistent Protection Mode Lock Bit
or
the Password
Protection Mode Lock Bit can be programmed. The Lock Register Program operation aborts if
there is an attempt to program both the Persistent Protection Mode and the Password Protec-
tion Mode Lock bits.
The Lock Register Command Set Exit command must be initiated to re-enable reads and
writes to the main memory.
Passw ord Protection Command Set Definitions
The Password Protection Command Set permits the user to program the 64-bit password, ver-
ify the programming of the 64-bit password, and then later unlock the device by issuing the
valid 64-bit password.
The
Passw ord Protection Command Set Entry
command sequence must be issued prior
to any of the commands listed following to enable proper command execution.
Note that issuing the
Passw ord Protection Command S et Entry
command
disabled
reads and w rites the main memory.
Passw ord Program Command
Passw ord Read Command
Passw ord Unlock Command
The Password Program command permits programming the password that is used as part of
the hardware protection scheme. The actual password is 64-bits long. There is no special ad-
dressing order required for programming the password.
The passw ord is programmed in
8-bit or 16-bit portions. Each portion requires a Passw ord Program Command.
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