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STANDARD PRODUCT
PM8315 TEMUX
DATASHEET
PMC-1981125
ISSUE 7
HIGH DENSITY T1/E1 FRAMER WITH
INTEGRATED VT/TU MAPPER AND M13 MUX
PROPRIETARY AND CONFIDENTIAL
37
Pin Name
Type
Pin
No.
Function
TFPO/TMFPO/
TGAPCLK
Output AB3
Framer Transmit Frame Pulse/Multi-frame Pulse
Reference (TFPO/TMFPO).
TFPO/TMFPO is valid
when the TEMUX is configured as a DS3 framer by
setting the OPMODE[1:0] bits in the Global
Configuration register and setting the TXGAPEN bit to
0 in the DS3 Master Unchannelized Interface Options
register.
TFPO pulses high for 1 out of every 85 clock cycles,
giving a reference M-subframe indication.
TMFPO pulses high for 1 out of every 4760 clock
cycles, giving a reference M-frame indication.
TFPO/TMFPO is updated on the falling edge of TICLK.
TFPO/TMFPO can be configured to be updated on the
rising edge of TICLK by setting the TDATIFALL bit to
1in the DS3 Master Unchannelized Interface Options
register..
Framer Gapped Transmit Clock (TGAPCLK).
TGAPCLK is valid when the TEMUX is configured as a
DS3 framer by setting the OPMODE[1:0] bits in the
Global Configuration register and setting the
TXGAPEN bit to 1 in the DS3 Master Unchannelized
Interface Options register.
TGAPCLK is derived from the transmit reference clock
TICLK or from the receive clock if loop-timed. The
overhead bit (gapped) positions are generated internal
to the device. TGAPCLK is held high during the
overhead bit positions. This clock is useful for
interfacing to devices which source payload data only.
TGAPCLK is used to sample TDATI and TFPI/TMFPI
when TXGAPEN is set to 1.
This signal shares a signal pin with ECLK[1]. When
enabled for unchannelized DS3 operation this signal
will be TFPO/TMFPO/TGAPCLK, otherwise it will be
ECLK[1].