
STANDARD PRODUCT
PM8315 TEMUX
DATASHEET
PMC-1981125
ISSUE 7
HIGH DENSITY T1/E1 FRAMER  WITH
INTEGRATED VT/TU MAPPER AND M13 MUX
PROPRIETARY AND CONFIDENTIAL
283
Table 49
- DS3 Receive Interface Timing
Symbol
Description
Min
Max
Units
f
RCLK
t0
RCLK
RCLK Frequency
52
MHz
RCLK minimum pulse width low
7.7
ns
t1
RCLK
RCLK minimum pulse width high
7.7
ns
tS
RPOS
RPOS/RDAT Set-up Time (See Note 1)
4
ns
tH
RPOS
RPOS/RDAT Hold Time (See Note 2)
1
ns
tS
RNEG
RNEG/RLCV Set-Up Time (See Note 1)
4
ns
tH
RNEG
RNEG/RLCV Hold Time (See Note 2)
1
ns
tP
RDATO
RSCLK Edge to RDATO Prop Delay
(See Notes 3 and 4)
2
12
ns
tP
RFPO
RSCLK Edge to RFPO/RMFPO Prop Delay
(See Notes 3 and 4)
2
12
ns
tP
ROVRHD
RSCLK Edge to ROVRHD Prop Delay
(See Notes 3 and 4)
2
12
ns
tP
RGAP
RGAPCLK Edge to RDATO[x] Prop Delay
(See Notes 3 and 4)
3
11
ns
Notes on DS3 Transmit Interface Timing:
1. When a set-up time is specified between an input and a clock, the set-up
time is the time in nanoseconds from the 1.4 Volt point of the input to the 1.4
Volt point of the clock.
2. When a hold time is specified between an input and a clock, the hold time is
the time in nanoseconds from the 1.4 Volt point of the clock to the 1.4 Volt
point of the input.
3. Output propagation delay time is the time in nanoseconds from the 1.4 Volt
point of the reference signal to the 1.4 Volt point of the output.
4. Maximum and minimum output propagation delays are measured with a 50
pF load on all the outputs.