參數(shù)資料
型號： Pentium II 266
廠商： Intel Corp.
英文描述： 32-Bit Processor With Low-Power Module(帶低能量模塊的32位處理器)
中文描述： 32位處理器低功率模塊（帶低能量模塊的32位處理器）
文件頁數(shù)： 3/50頁
文件大小： 1003K
代理商： PENTIUM II 266
Datasheet
3
Pentium
II Processor – Low-Power Module
Contents
1.0
Introduction
..................................................................................................................7
1.1
Module Terminology..............................................................................................7
Architecture Overview
.............................................................................................7
Module Connector Interface
................................................................................10
3.1
Signal Definitions.................................................................................................10
3.1.1
Signal List...............................................................................................10
3.1.2
Memory (109 Signals) ............................................................................11
3.1.3
AGP (60 SIGNALS)................................................................................12
3.1.4
PCI (58 SIGNALS) .................................................................................13
3.1.5
Processor/PIIX4E Sideband (8 Signals).................................................14
3.1.6
Power Management/Geyserville (11 Signals) ........................................15
3.1.7
Clock (9 Signals)....................................................................................16
3.1.8
Voltages (54 Signals).............................................................................17
3.1.9
ITP/JTAG (9 Signals) .............................................................................18
3.1.10 Miscellaneous (82 Signals) ....................................................................18
3.2
Connector Pin Assignments................................................................................19
3.3
Pin and Pad Assignments...................................................................................21
Functional Description
...........................................................................................23
4.1
Low-Power Module..............................................................................................23
4.2
L2 Cache.............................................................................................................23
4.3
443BX Host Bridge/Controller.............................................................................23
4.3.1
Memory Organization.............................................................................24
4.3.2
Reset Strap Options...............................................................................24
4.3.3
PCI Interface ..........................................................................................25
4.3.4
AGP Interface.........................................................................................25
4.4
Electrical Requirements ......................................................................................25
4.4.1
DC Requirements...................................................................................26
4.4.2
AC Requirements...................................................................................27
4.4.2.1 System Bus Clock (BCLK) Signal Quality Specifications and
Measurement Guidelines ..........................................................28
4.5
Module Signal Termination..................................................................................29
4.6
Processor Core Voltage Regulation....................................................................29
4.6.1
Voltage Regulator Efficiency..................................................................29
4.6.2
Voltage Regulator Control......................................................................30
4.6.2.1 Voltage Signal Definition and Sequencing ................................30
4.6.3
Power Planes: Bulk Capacitance Requirements....................................32
4.6.4
Surge Current Study...............................................................................32
4.6.4.1 Slew-Rate Control: Circuit Description......................................34
4.6.4.2 Under-Voltage Lockout: Circuit Description ..............................36
4.6.4.3 Over Voltage Lockout: Circuit Description.................................36
4.6.4.4 Over Current Protection: Circuit Description .............................36
4.7
Active Thermal Feedback....................................................................................37
4.8
Power Management............................................................................................37
4.8.1
Clock Control Architecture......................................................................37
2.0
3.0
4.0
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