參數(shù)資料
型號(hào)： Pentium II 266
廠商： Intel Corp.
英文描述： 32-Bit Processor With Low-Power Module(帶低能量模塊的32位處理器)
中文描述： 32位處理器低功率模塊（帶低能量模塊的32位處理器）
文件頁(yè)數(shù)： 24/50頁(yè)
文件大?。?/td> 1003K
代理商： PENTIUM II 266
Pentium
II Processor – Low-Power Module
24
Datasheet
4.3.1
Memory Organization
The complete memory interface of the 443BX Host Bridge/Controller is available at the module’s
connector; all of the 443BX standard Mode memory configurations and modes of operation are
supported on the signaling interface. This allows the memory interface to support the following:
One set of memory control signals, sufficient to support up to three SO_DIMM sockets and six
banks of SDRAM at 66 MHz
One CKE signal for each banks
Key memory features not supported by the 443BX Host Bridge/Controller standard Mode are:
Support for eight banks of memory
Second set of memory address lines (MAA[13:0])
100 MHz SDRAM (and Front Side Bus)
DRAM technologies supported by 443BX Host Bridge/Controller include Extended Data Out
(EDO) and SDRAM. These memory types may not be mixed in the system. In other words, all
DRAM in all rows (RAS[5:0]#) must be of the same technology. The 443BX Host
Bridge/Controller targets 60 ns EDO DRAMs. and 66 MHz SDRAMs.
The module’s clocking architecture supports the use of SDRAM. Due to the tight timing
requirements of 66-MHz SDRAM clocks, the clocking mode for SDRAM or system manufacturer
custom memory configurations allows all host and SDRAM clocks to be generated from the same
clocking architecture on the OEM’s system electronics. For complete details about using SDRAM
memory, and for trace length guidelines, see the
Pentium
II Processor – Low Power Module at
266 MHz – 66 MHz SDRAM DIMM Routing Guidelines
(order number 273230).
For details on memory device support, organization, size and addressing, refer to the
Intel 440BX
AGPset: 82443BX Host Bridge/Controller
datasheet (order number 290633).
4.3.2
Reset Strap Options
The 443BX Host Bridge/Controller has several strap options on the memory address bus which
define the behavior of the device after reset. For the module, several of these strap options are
implemented on the module. Other straps are allowed to override the default settings. Table 14
shows the various straps and how they are handled by the module.
Table 14. Configuration Straps for the 443BX Host Bridge/Controller
Signal
Function
Module Default Setting
Optional Override on
System Electronics
MAB[12]#
Host Frequency Select
No strap. (66 MHz default)
None
MA[11]#
In Order Queue Depth
No strap. (Maximum Queue Depth
is set (i.e., 8))
None
MA[10]
Quick Start Select
Strapped high on the module for
Quick Start mode.
None
MA[9]#
AGP disable
No strap. AGP is enabled
Pull up this signal to
disable AGP interface.
MA[7]#
MM Config
No strap. Standard mode.
None
MA[6]#
Host Bus Buffer Mode Select
Strapped high on the module for
FSB buffers.
None
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