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CHAPTER 3 CPU ARCHITECTURE
User
’
s Manual U15017EJ2V0UD
Table 3-6. Special Function Register (SFR) List (1/3)
Address
Name of Special Function Register (SFR)
Symbol
R/W
Bit Units for Manipulation
After Reset
Note 1
1 Bit
8 Bits 16 Bits
0FF00H
Port 0
P0
R
—
Undefined
0FF01H
Port 1
P1
—
0FF02H
Port 2
P2
R/W
—
00H
Note 2
0FF04H
Port 4
P4
—
0FF05H
Port 5
P5
—
0FF06H
Port 6
P6
—
0FF07H
Port 7
P7
—
0FF08H
Port 8
P8
—
0FF09H
Port 9
P9
—
0FF0AH
Port 10
P10
—
0FF0BH
Port read 7
PLR7
R
—
Undefined
0FF0CH
Port read 8
PLR8
—
0FF0DH
Port read 9
PLR9
—
0FF10H
16-bit timer counter 0
TM0
—
—
0000H
0FF12H
16-bit capture/compare register 00
(16-bit timer/event counter)
CR00
R/W
—
—
0FF14H
16-bit capture/compare register 01
(16-bit timer/event counter)
CR01
—
—
0FF16H
Capture/compare control register 0
CRC0
—
00H
0FF18H
16-bit timer mode control register 0
TMC0
—
0FF1BH
Watch timer clock select register
WTCL
—
0FF1CH
Prescaler mode register 0
PRM0
—
0FF1EH
Remote controller mode register
REMM
—
0FF22H
Port 2 mode register
PM2
—
FFH
0FF24H
Port 4 mode register
PM4
—
0FF25H
Port 5 mode register
PM5
—
0FF26H
Port 6 mode register
PM6
—
0FF32H
Pull-up resistor option register 2
PU2
—
00H
0FF4EH
Pull-up resistor option register
PUO
—
0FF50H
8-bit timer counter 50
TM50
TM5
R
—
0FF51H
8-bit timer counter 51
TM51
—
—
0FF52H
8-bit compare register 50
CR50
CR5
R/W
—
0FF53H
8-bit compare register 51
CR51
—
—
0FF54H
8-bit timer mode control register 50
TMC50
TMC5
04H
0FF55H
8-bit timer mode control register 51
TMC51
—
0FF56H
Timer clock select register 50
TCL50
TCL5
00H
0FF57H
Timer clock select register 51
TCL51
—
Notes 1.
These values are when the LOCATION 0H instruction is executing. When the LOCATION 0FH
instruction is executing, F0000H is added to these values.
2.
Since each port is initialized in the input mode by a reset, in fact, 00H is not read out. The output latch
is initialized to 0.