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202
User
’
s Manual U15017EJ2V0UD
CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE
13.2 Configuration of Asynchronous Serial Interface
The asynchronous serial interface includes the following hardware.
Table 13-2. Configuration of Asynchronous Serial Interface
Item
Configuration
Registers
Transmit shift register 0 (TXS0)
Receive shift register 0 (RX0)
Receive buffer register 0 (RXB0)
Control registers
Asynchronous serial interface mode register 0 (ASIM0)
Asynchronous serial interface status register 0 (ASIS0)
Baud rate generator control register 0 (BRGC0)
(1) Transmit shift register 0 (TXS0)
This register is used to set transmit data. Data written to TXS0 is sent as serial data.
If a data length of 7 bits is specified, bits 0 to 6 of the data written to TXS0 are transferred as transmit data.
Transmission is started by writing data to TXS0.
TX0 can be written with an 8-bit memory manipulation instruction, but cannot be read.
RESET input sets TXS0 to FFH.
Caution
Do not write to TXS0 during transmission.
TXS0 and receive buffer register 0 (RXB0) are allocated to the same address. Therefore,
attempting to read TXS0 will result in reading the values of RXB0.
(2) Receive shift register 0 (RX0)
This register is used to convert serial data input to the R
X
D0 pin to parallel data. Receive data is transferred to
the receive buffer register 0 (RXB0) one byte at a time as it is received.
RX0 cannot be directly manipulated by program.
(3) Receive buffer register 0 (RXB0)
This register is used to hold receive data. Each time one byte of data is received, new receive data is transferred
from the receive shift register 0 (RX0).
If a data length of 7 bits is specified, receive data is transferred to bits 0 to 6 of RXB0, and the MSB of RXB0
always becomes 0.
RXB0 can be read by an 8-bit memory manipulation instruction, but cannot be written.
RESET input sets RXB0 to FFH.
Caution
Be sure to read receive buffer register 0 (RXB0) even when a receive error occurs; otherwise
an overrun error occurs next time data is received causing a receive error.
(4) Transmission control circuit
This circuit controls transmit operations such as the addition of a start bit, parity bit, and stop bit(s) to data written
to transmit shift register 0 (TXS0), according to the contents set to the asynchronous serial interface mode register
0 (ASIM0).