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CHAPTER 7 16-BIT TIMER/EVENT COUNTER
User
’
s Manual U15017EJ2V0UD
7.3 Control Register
The following four types of registers control 16-bit timer/event counter 0.
16-bit timer mode control register 0 (TMC0)
Capture/compare control register 0 (CRC0)
Prescaler mode register 0 (PRM0)
(1) 16-bit timer mode control register 0 (TMC0)
This register specifies the operation mode of the 16-bit timer, and the clear mode and overflow detection of
16-bit timer counter 0.
TMC0 is set using a 1-bit or 8-bit memory manipulation instruction.
RESET input sets TMC0 to 00H.
Caution 16-bit timer counter 0 (TM0) starts operating when a value other than a combination of 0 and
0 (operation stop mode) is set to TMC02 and TMC03. To stop the operation, set a combination
of 0 and 0 to TMC02 and TMC03.
Figure 7-2. Format of 16-Bit Timer Mode Control Register 0 (TMC0)
Address: 0FF18H After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
<0>
TMC0
0
0
0
0
TMC03
TMC02
0
OVF0
TMC03
TMC02
TM0 operating mode specification
0
0
Operation stop (TM0 is cleared to 0).
0
1
Free-running mode
1
0
Clears and starts at valid edge input to TI00.
1
1
Clears and starts on match between TM0 and CR00.
OVF0
16-bit timer counter 0 (TM0) overflow detection
0
Does not overflow.
1
Overflows.
Cautions 1. To specify the valid edge for pin TI00, use prescaler mode register 0 (PRM0).
2. When the clear & start mode on match between TM0 and CR00 is selected, the OVF0
flag is set to 1 when the value of TM0 changes from FFFFH to 0000H with CR00 set to
FFFFH.
Remarks 1.
At any timing, writing 0 to OVF0 causes it to be cleared.
2.
TI00:
Input pin of 16-bit timer/event counter 0
TM:
16-bit timer counter 0
CR00: Compare register 00
CR01: Compare register 01