261
CHAPTER 16 INTERRUPT FUNCTION
User
’
s Manual U15017EJ2V0UD
16.7.3 Maskable interrupt priority levels
The
μ
PD784975A performs multiple interrupt servicing in which an interrupt is acknowledged during servicing of
another interrupt. Multiple interrupts can be controlled by priority levels.
There are two kinds of priority control, control by default priority and programmable priority control in accordance
with the setting of the priority specification flag. In priority control by means of default priority, interrupt service is
performed in accordance with the priority preassigned to each interrupt request (default priority) (refer to
Table 16-
2
). In programmable priority control, interrupt requests are divided into four levels according to the setting of the priority
specification flag. Interrupt requests for which multiple interrupt is permitted are shown in Table 16-5.
Since the IE flag is cleared to 0 automatically when an interrupt is acknowledged, when multiple interrupt is used,
the IE flag should be set to 1 to enable interrupts by executing an IE instruction in the interrupt service program, etc.
Table 16-5. Multiple Interrupt Processing
Priority of Interrupt Currently
Being Acknowledged
ISPR Value
IE Flag in PSW
PRSL in
IMC Flag
Acknowledgeable Maskable Interrupts
No interrupt being
acknowledged
00000000
0
×
All macro service only
1
×
All maskable interrupts
3
00001000
0
×
All macro service only
1
0
All maskable interrupts
1
1
All macro service
Maskable interrupts specified as
priority 0, 1, or 2
2
0000
×
100
0
×
All macro service only
1
×
All macro service
Maskable interrupts specified as
priority 0 or 1
1
0000
××
10
0
×
All macro service only
1
×
All macro service
Maskable interrupts specified as
priority 0
0
0000
×××
1
×
×
All macro service only
Non-maskable interrupts
0100
××××
×
×
All macro service only