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CHAPTER 20 INSTRUCTION OPERATION
User’s Manual U15017EJ2V0UD
20.3 Lists of Addressing Instructions
(1) 8-bit instructions (values in parentheses are combined to express the A description as r.)
MOV, XCH, ADD, ADDC, SUB, SUBC, AND OR XOR, CMP, MULU, DIVUW, INC, DEC, ROR, ROL, RORC,
ROLC, SHR, SHL, ROR4, ROL4, DBNZ, PUSH, POP, MOVM, XCHM, CMPME, CMPMNE, CMPMNC, CMPMC,
MOVBK, XCHBK, CMPBKE, CMPBKNE, CMPBKNC, CMPBKC
Table 20-1. 8-Bit Addressing Instructions
Second
#byte
A
r
saddr
sfr
!addr16
mem
r3
[WHL+]
n
None
Note 2
operand
r'
saddr'
!!addr24
[saddrp]
PSWL
[WHL–]
First operand
[%saddrg]
PSWH
A
(MOV)
ADD
Note 1
(MOV)
MOV
(MOV)
Note 6
(XCH)
Note 6
(ADD)
Notes 1, 6
MOV
(MOV)
MOV
MOV
(MOV)
(XCH)
(ADD)
Note 1
XCH
(ADD)
Note 1
(XCH)
(
ADD)
Note 1
(XCH)
ADD
Note 1
XCH
ADD
Note 1
(XCH)
(ADD)
Note 1
r
MOV
ADD
Note 1
(MOV)
MOV
MOV
MOV
MOV
ROR
Note 3
MULU
(XCH)
(ADD)
Note 1
XCH
ADD
Note 1
XCH
ADD
Note 1
XCH
ADD
Note 1
XCH
DIVUW
INC
DEC
saddr
MOV
ADD
Note 1
(MOV)
Note 6
(ADD)
Note 1
MOV
ADD
Note 1
MOV
INC
XCH
ADD
Note 1
DEC
DBNZ
sfr
MOV
ADD
Note 1
MOV
(ADD)
Note 1
MOV
ADD
Note 1
PUSH
POP
!addr16
MOV
MOV
ADD
Note 1
MOV
!!addr24
mem
MOV
ADD
Note 1
[saddrp]
[%saddrg]
mem3
ROR4
ROL4
r3
MOV
MOV
PSWL
PSWH
B, C
DBNZ
STBC, WDM
MOV
[TDE+]
(MOV)
(ADD)
Note 1
MOVM
Note 4
MOVBK
Note 5
[TDE–]
Notes 1.
ADDC, SUB, SUBC, AND, OR, XOR, and CMP are identical to ADD.
2.
There is no second operand, or the second operand is not an operand address.
3.
ROL, RORC, ROLC, SHR, and SHL are identical to ROR.
4.
XCHM, CMPME, CMPMNE, CMPMNC, and CMPMC are identical to MOVM.
5.
XCHBK, CMPBKE, CMPBKNE, CMPBKNC, and CMPBKC are identical to MOVBK.
6.
When saddr is saddr2 in this combination, the instruction has a short code length.