![](http://datasheet.mmic.net.cn/390000/PD784976A_datasheet_16826985/PD784976A_323.png)
323
CHAPTER 17 STANDBY FUNCTION
User
’
s Manual U15017EJ2V0UD
17.6 Check Items When STOP Mode/IDLE Mode Is Used
Check items required to reduce the current consumption when STOP mode or IDLE mode is used are shown below.
(1) Is the output level of each output pin appropriate
The appropriate output level for each pin varies according to the next-stage circuit. You should select the output
level that minimizes the current consumption.
If high level is output when the input impedance of the next-stage circuit is low, a current will flow from the
power supply to the port, resulting in an increased current consumption. This applies when the next-stage
circuit is a CMOS IC, etc. When the power supply is off, the input impedance of a CMOS IC is low. In order
to suppress the current consumption, or to prevent an adverse effect on the reliability of the CMOS IC, low
level should be output. If a high level is output, latchup may result when power is turned on again.
Depending on the next-stage circuit, inputting low level may increase the current consumption. In this case,
high-level or high-impedance output should be used to reduce the current consumption.
If the next-stage circuit is a CMOS IC, the current consumption of the CMOS IC may increase if the output
is made high-impedance when power is supplied to it (the CMOS IC may also be overheated and damaged).
In this case you should output an appropriate level, or pull the output high or low with a resistor.
The method of setting the output level depends on the port mode.
When a port is in control mode, the output level is determined by the status of the on-chip hardware, and
therefore the on-chip hardware status must be taken into consideration when setting the output level.
In port mode, the output level can be set by writing to the port output latch and port mode register by software.
When a port is in control mode, this output level can be set easily by changing to port mode.
(2) Is the input pin level appropriate
The voltage level input to each pin should be in the range between V
SS
potential and V
DD
potential. If a voltage
outside this range is applied, the current consumption will increase and the reliability of the
μ
PD784975A may
be adversely affected.
Also ensure that an intermediate potential is not applied.
(3) Are on-chip pull-up resistors necessary
An unnecessary pull-up resistor will increase the current consumption and cause a latchup of other devices. A
mode should be specified in which pull-up resistors are used only for parts that require them.
If there is a mixture of parts that do and do not require pull-up resistors, for parts that do, you should connect
a pull-up resistor externally and specify a mode in which the on-chip pull-up resistor is not used.
(4) A/D converter
The current flowing to the AV
DD
pin can be reduced by clearing the ADCS bit (bit 7) of the A/D converter mode
register (ADM). The current can be further reduced, if required, by cutting the current supply to the AV
DD
pin
with external circuitry.
When ADCS = 1, the AV
DD
pin can be used with the same potential as V
SS1
.