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參數(shù)資料
| 型號： | P95020NQG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| 封裝： | 10 X 10 MM, 0.85 MM HEIGHT, QFN-132 |
| 文件頁數(shù)： | 81/169頁 |
| 文件大?。?/td> | 4297K |
| 代理商： | P95020NQG |
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IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
19
2011 Integrated Device Technology, Inc.
Audio – Pin Definitions
Table 12. Audio Module Pin Definitions
PIN
#
PIN_ID
DESCRIPTION
A5
MIC_R-
Differential Analog microphone negative input (right channel)
B4
MIC_R+/DMICDAT2
Differential Analog microphone positive input (right channel) or second digital microphone data input
A6
MICBIAS_R/DMICSEL
Analog microphone supply (right channel) or digital microphone select output (GPO)
B5
MICBIAS_L/DMICCLK
Analog microphone supply (left channel) or digital microphone clock output
A7
MIC_L+/DMICDAT1
Differential Analog microphone positive input (left channel) or first digital microphone data input
B6
MIC_L-
Differential Analog microphone negative input (left channel)
A8
AFILT2
ADC filter cap
B7
AFILT1
ADC filter cap
A9
AGND_MIC
Return path for microphone supply (MICBIAS_L/R )
B8
LISLP
Differential Analog Line Level positive input (left channel)
A10
LISLM
Differential Analog Line Level negative input (left channel)
B9
LISRP
Differential Analog Line Level positive input (right channel)
A11
LISRM
Differential Analog Line Level negative input (right channel)
B10
LLO_L
Single Ended Line Level Output (Left channel)
B11
LLO_R
Single Ended Line Level Output (Right channel)
A12
AVREF
Analog reference (virtual ground) bypass cap
B12
VDD_AUDIO33
Filter Capacitor for Internal 3.3V Audio LDO
A13
ADC_REF
ADC reference bypass cap
B13
HP_R
Cap-less headphone output (right channel)
A14
HP_L
Cap-less headphone output (left channel)
B14
AGND
Analog (audio) return
A15
VIRT_GND
Cap-less headphone signal return (virtual ground)
Audio – Section Overview
The Audio section is divided into five subsections:
1. Analog Input Buffer and Converter Block
2. DAC, ADC
3. Audio Mixer Block
4. Analog and Class D Output Blocks
5. Sub System Control and Interface Blocks
Note: All register settings are lost when power is removed.
Audio – Power Up Audio Module
The Audio subsystem is powered by an internal regulator:
- The Audio A/D, D/A converters, Microphone interface
and Head phone drivers are powered by an internal
3.3V LDO. The enable/disable control is defined in
VDD_AUDIO33 LDO Register (0xA06F).
- The digital processing block is powered by an internal
1.8V LDO. The enable/disable control is defined in
VDD_AUDIO18 Register (0xA06E).
- The Class-D driver is powered by the 5V boost
converter (connect on the board).
Before enabling power up, pre-configure the Audio clock
setting in the PCON MCLK_CFG Register (0xA037). The
LDO will automatically assert/de-assert the reset signal for
Audio digital when the Audio LDOs are powered up. Audio
logic can also be explicitly reset by programming the
Audio reset control bit AUDIO_RST, defined in PCON
Audio Control Register (0xA038).
The Audio function can be enabled or disabled by the
PCON Audio Control Register (0xA038). Disabled Audio
will stay in low power state. In disabled mode, the clock is
stopped and the Audio registers cannot be accessed, but
will retain pre-configured values.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P95020NQG8 | 制造商:Integrated Device Technology Inc 功能描述:Power Management and Control 132-Pin QFN EP T/R 制造商:Integrated Device Technology Inc 功能描述:POWER MANAGEMENT AUDIO & CONTROL - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:Integrates Audio, LED B/Light Pwr Mgt |
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| P95020ZDLLG8 | 制造商:Integrated Device Technology Inc 功能描述:124-LGA - Tape and Reel |
| P95020ZDNQG | 制造商:Integrated Device Technology Inc 功能描述:132-VFQFPN - Bulk |
| P95020ZDNQG8 | 制造商:Integrated Device Technology Inc 功能描述:132-VFQFPN - Tape and Reel |
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