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參數(shù)資料
| 型號： | P95020NQG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| 封裝： | 10 X 10 MM, 0.85 MM HEIGHT, QFN-132 |
| 文件頁數(shù)： | 146/169頁 |
| 文件大?。?/td> | 4297K |
| 代理商： | P95020NQG |
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IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
78
2011 Integrated Device Technology, Inc.
RTC MODULE
Features
Counts Seconds, Minutes, Hours, Day, Date, Month
and Year (with Leap-Year Compensation Valid Up to
year 2100
- Two time-of-day alarms
- Low power
Description
The low power serial real-time clock (RTC) device has two
programmable time-of-day alarms. Address and data are
transferred serially through the IC bus. The device
provides seconds, minutes, hours, day, date, month and
year information. The date at the end of the month is
automatically adjusted for months with fewer than 31 days,
including corrections for leap year. The clock operates in
either 24-hour format or 12-hour format with AM/PM
indicator.
RTC – General Description
The Real-Time Clock (RTC) block is a low-power
clock/date device with two programmable time-of-day/date
alarms. The clock/date provides seconds, minutes, hours,
day, date, month and year information. The date at the
end of the month is automatically adjusted for months with
fewer than 31 days, including corrections for leap years.
The clock operates in either the 24-hour or 12-hour format
with an AM/PM indicator. The RTC cannot be disabled
while the system is powered on. The register settings and
logic are only reset the first time the system is powered on
by inserting either the AC adapter or the battery. After
reset, the time keeping registers are reset and must be
synchronized to the real time by programming its time
keeping registers. The alarm interrupts are disabled by
default.
The time and date information is set and monitored by
writing and reading the appropriate register bytes. The
following sections describe the RTC TIMEKEEPER and
RTC DATE registers. The contents of the time and date
registers are in BCD format. The RTC block can be run in
either 12-hour or 24-hour mode. Bit 6 of the HOUR
register is defined as the 12-hour or 24-hour mode-select
bit. When high, the 12-hour mode is selected. In 12-hour
mode, bit 5 is the PM bit with logic high being PM. In the
24-hour mode, bit 5 is the second 10-hour bit (20 to 23
hours). All hour values, including the alarms, must be re-
entered whenever the TIME_12 mode bit is changed. The
century bit (bit 7 of the month register) is toggled when the
YEAR register overflows from 99 to 0. The days register
increments at midnight. Values that correspond to the day
of the week are user-defined, but must be sequential (i.e.,
if 1 equals Sunday, then 2 equals Monday and so on).
Illogical time and date entries result in undefined operation.
When reading or writing the time and date registers,
secondary (user) buffers are used to prevent errors when
the internal registers update. When reading the time and
date registers, the user buffers are synchronized to the
internal registers at the time of reading address pointing to
zero.
The countdown chain is reset whenever the
seconds register is written. Write transfer occurs when
the processor bus receives a write command. To avoid
rollover issues, once the countdown chain is reset, the
remaining time and date registers must be written within
0.5 second.
The RTC block contains two time-of-day/date alarms. The
alarms can be programmed (via the alarm enable and
INT_EN bits of the control registers defined on Pages 81
through 84) to activate the interrupt (INT) output when an
alarm match condition occurs. Bit 7 of each of the time of
day/date alarm registers are mask bits. When all the mask
bits for each alarm are logic 0 an alarm occurs only when
the values in the timekeeping registers 00h to 04h match
the values stored in the time-of-day/date alarm register.
The alarms can also be programmed to repeat every
second, minute, hour, day or date. Table 117 and Table
118 show the possible settings.
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