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參數(shù)資料
| 型號： | P95020NQG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| 封裝： | 10 X 10 MM, 0.85 MM HEIGHT, QFN-132 |
| 文件頁數(shù)： | 38/169頁 |
| 文件大小： | 4297K |
| 代理商： | P95020NQG |
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IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
132
2011 Integrated Device Technology, Inc.
ON State
The IDTP95020 enters the ON state after momentarily pressing and releasing a button attached to SW_DET or after an AC
adaptor insertion. The CKGEN (Clock generator module) power is enabled and the 8MHz I2C and processor clock is available.
Power Sequencing by Embedded Microcontroller
A pending embedded P interrupt will trigger the following actions;
Hardware Actions
-
Set PSTATE_ON bit of POWER STATE AND SWITCH CONTROL REGISTER (0xA031) to 1, turn on the power of
CKGEN (VDD_CKGEN18, VDD_CKGEN33) and the 8MHz (processor and I2C clock) clock is available.
-
Turn on the power of the Embedded Microcontroller (VDD_EMBUP18) and release the processor reset automatically
after 4ms. The Processor starts to execute code stored in the internal ROM or external ROM.
Firmware Actions
-
Embedded microcontroller (6811) sub-system start with the boot sequence.
-
The firmware (boot sequence) starts by checking whether the external ROM is available (read EX_ROM bit in the
global registers). If it exists, load the EX_ROM data into internal RAM. Otherwise, execute code in the internal ROM.
-
Firmware executes the code according to the contents and interrupt is sent to sequence the power.
-
After the sequence is done, the interrupt is cleared as defined in the sequence, then the processor enters low power
mode and wait for interrupts.
Power On Reset Output (POR_OUT)
The POR_OUT pin is an open drain output pin which is
controlled by firmware as part of the power up sequence.
This signal is used to reset the devices in the system,
which are powered by the IDTP95020 device until the
power is ready. The output state of POR_OUT is defined
by the power up sequence.
Power Switch Detector (SW_DET)
The PCON module also includes special power switch
detection circuitry to provide a “push-on/push-off” interface
via the switch detect (SW_DET) pin. By connecting a
button to this pin, three different events can be triggered.
The first is a short switch interrupt (>100ms) which is
generated by momentarily pressing and releasing a button
attached to SW_DET. The second is a medium switch
interrupt which is generated by pressing and holding the
button and releasing it after 2 seconds (configurable to
2/3/4/5 seconds). The status of each of these switches
can be monitored in the Switch Control Register (0xA031).
The third switch function is triggered when the button is
pressed and held for longer than 15 seconds. This event
will not generate an interrupt but will generate system
reset and force the IDTP95020 into the OFF state.
GPIO General Description
The GPIO pins are turned on and off using the GPIO OFF
Register. This register is used like a multiplexer to allow
the GPIO and TSC/ADC subsystems to share external
pins. When in GPIO mode (GPIO_OFF bits set to logic
‘0’), the GPIO Function Register configures the pin to
operate as a GPIO or some other special function such as
a status LED output. If not configured to perform a special
function, each GPIO can be configured as an input or
output by setting the corresponding bit in the GPIO
Direction Register.
When configured as an output, GPIO4, GPIO6, GPIO7,
GPIO8, GPIO9 and GPIO10 pins can be configured as a
CMOS output or an open drain output by setting the
corresponding bit in the GPIO Output Mode Register.
GPIO1, GPIO2, GPIO3 and GPIO5 can be configured as
an open drain output only (Should be connected to an
external power supply through an external pull-up resistor),
the corresponding bit in the GPIO Output Mode Register is
don’t-care for these GPIO pins. Each GPIO pin configured
as an output will reflect the value held in the GPIO Data
Register with a logic ‘0’ causing the pin to be low and a
logic ‘1’ causing the pin to be high. Reading from the
GPIO Data Register will return the last value written to it.
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