參數(shù)資料
型號(hào): P95020NQG
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): 電源管理
英文描述: 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝: 10 X 10 MM, 0.85 MM HEIGHT, QFN-132
文件頁(yè)數(shù): 72/169頁(yè)
文件大?。?/td> 4297K
代理商: P95020NQG
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IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
163
2011 Integrated Device Technology, Inc.
EMBUP – Functional Description
After a Power on Reset (POR), the IDTP95020 embedded
microcontroller will look for the presence of an external
ROM via the EX_ROM pin. If an external ROM is present,
the IDTP95020 embedded microcontroller will disable the
internal ROM, and load the contents into a 1.5 KB internal
RAM from which it can be executed. If no external ROM
is present, then the internal ROM will be used for program
code.
The IDTP95020 embedded microcontroller will execute
the start-up sequence contained in the internal or external
ROM and will set the various registers accordingly (all
internal registers are available for manipulation by an
external application processor through the IC interface at
all times). Once the registers have been programmed, the
embedded microcontroller will either run additional
program code or go into standby until an interrupt or other
activity generates a wake event. Various events will be
customer specific but could include power saving modes,
sleep modes, over-temperature conditions, etc.
Contention caused by requests from both the embedded
microcontroller and external processor is resolved through
a bus arbitration scheme. There is no support for data
concurrency in the register set. The IDTP95020 will
execute the latest (last) data/command programmed into
any individual control register(s) regardless of the source
(embedded microcontroller or external application
processor).
Care should be taken during the code
development stage to avoid command contention.
EMBUP – On-chip RAM and ROM
Table 274. On-chip RAM and ROM Size
MEMORY TYPE SIZE
ROM
4 k Bytes Maximum
RAM
1.5 k Bytes Maximum
EMBUP – IC Slave Interface
Please see the separate I2C_I2S Module section starting
on Page 142 for details (including register definitions).
EMBUP – Peripherals
The peripherals of the subsystem are comprised of a timer,
an interrupt controller and an IC master. The embedded
processor’s peripherals are not visible to the external
application processor.
The IC master is used to optionally load data or code
from an external serial EEPROM. The target EEPROM
address is hardwired to 1010000.
The IDTP95020
supports EEPROMs using 16-bit addressing in the range
of 4kB to 64KB.
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