參數(shù)資料
型號： P95020NQG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝： 10 X 10 MM, 0.85 MM HEIGHT, QFN-132
文件頁數(shù)： 10/169頁
文件大?。?/td> 4297K
代理商： P95020NQG
IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
107
2011 Integrated Device Technology, Inc.
Boost5 – Register Settings
Register 0xA088 and Register 0xA089 control and monitor the BOOST5 Power Supply. The regulator can be programmed by
writing 8-bit control words to these registers. The Base addresses are defined in Table 11 – Register Address Global Mapping
on Page 16.
Output Voltage Register
The Output Voltage Register contains the Enable Bit and the Output Voltage settings
IC Address = Page-0: 136(0x88), C Address = 0xA088
Table 165. Boost5 Output Voltage Register
BIT
BIT NAME
DEFAULT
SETTING
USER
TYPE
VALUE
DESCRIPTION / COMMENTS
[4:0] BOOST5_VOUT 10011b
RW
(See Table 166) Output Voltage = BOOST5_VOUT * 0.05V + 4.05V
[6:5] RESERVED
00b
RW
RESERVED
7
ENABLE
0b
RW
1 = Enable
0 = Disable
Enable BOOST5
Note: Default voltage setting VOUT = 5.00 V.
Table 166. Register 0xA088 Output Voltage Bit Setting [4:0]
BIT
SETTING
OUTPUT
VOLTAGE
BIT
SETTING
OUTPUT
VOLTAGE
BIT
SETTING
OUTPUT
VOLTAGE
00000
4.05
00111
4.40
01110
4.75
00001
4.10
01000
4.45
01111
4.80
00010
4.15
01001
4.50
10000
4.85
00011
4.20
01010
4.55
10001
4.90
00100
4.25
01011
4.60
10010
4.95
00101
4.30
01100
4.65
10011
5.00
00110
4.35
01101
4.70
Note: Contains an initial 4.05V offset.
Control Register
The Control Register contains Power Good, Peak Current Limit and Clock Select settings
IC Address = Page-0: 137(0x89), C Address = 0xA089
Table 167. . Boost5 Control Register
BIT
BIT NAME
DEFAULT
SETTING
USER
TYPE
VALUE
DESCRIPTION / COMMENTS
0
RESERVED
0b
RW
1
CLOCK_SEL 1b
RW
1 = 1.0 MHz
0 = 0.5 MHz
Clock Frequency
[3:2] I_LIM
11b
RW
[See Table 168]
Peak Current Limit
4
RESERVED
0b
RW
5
PGOOD
0b
R
1 = Power Good
0 = Power Bad
Power Good
[7:6] RESERVED
00b
RW
RESERVED
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