參數(shù)資料
型號： P95020NQG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝： 10 X 10 MM, 0.85 MM HEIGHT, QFN-132
文件頁數(shù)： 129/169頁
文件大?。?/td> 4297K
代理商： P95020NQG
IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
62
2011 Integrated Device Technology, Inc.
Charger – Register Addresses
The Charger can be controlled and monitored by writing 8-bit control words to the various registers. The Base addresses are
defined in Table 11 – Register Address Global Mapping on Page 16.
Current Limit Configuration Register
IC Address = Page-0: 144(0x90), C Address = 0xA090
Table 91
. Current Limit Configuration Register
BIT
BIT NAME
DEFAULT SETTING
USER
TYPE
VALUE
DESCRIPTION /
COMMENTS
[2:0] I_LIM
000b
RW
(See Table 92)
Current Limit Setting
[6:3] RESERVED 0h
RW
RESERVED
7
INT_ILIM
1b
RW
(See Table 92)
Current Limit Source
Table 92. Input Current Limit Setting
INT_ILIM
(0XA090[7])
GPIO_TSC
REGISTER:
0XA030[4]
PIN A72:
GPIO4/CHRG_ILIM
0XA090[2]
0XA090[1]
0XA090[0]
INPUT CURRENT LIMIT
0
x
invalid
1
0
x
500mA
1
x
1500mA
1
x
0
100mA
0
1
500mA
0
1
0
1000mA
0
1
1500mA
1
0
2000mA
1
0
1
invalid
1
0
invalid
1
invalid
Charging Configuration Register
IC Address = Page-0: 145(0x91), C Address = 0xA091
Table 93. Charging Configuration Register
BIT
BIT NAME
DEFAULT
SETTING
USER
TYPE
VALUE
DESCRIPTION / COMMENTS
[3:0] CHG_CUR
0h
RW
(See Table 95) Charging Current (via sense resistor) = CHG_CUR x 100 mA
[5:4] CHG_VOL
00b
RW
(See Table 94) Maximum Battery Voltage
[7:6] RESERVED 00b
RW
RESERVED
Table 94. Register 0xA091, (0x91) Charging Maximum Voltage (CHG_VOL) Settings, Bits [5:4]
BIT 5 BIT 4 DESCRIPTION
0
4.10 Volts
0
1
4.15 Volts
1
0
4.20 Volts
1
N/A
相關(guān)PDF資料
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參數(shù)描述
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