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| 型號(hào)： | P95020NQG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| 封裝： | 10 X 10 MM, 0.85 MM HEIGHT, QFN-132 |
| 文件頁(yè)數(shù)： | 75/169頁(yè) |
| 文件大?。?/td> | 4297K |
| 代理商： | P95020NQG |
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IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
166
2011 Integrated Device Technology, Inc.
-
An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the IDTP95020. This includes signal
traces just underneath the device, or on layers
adjacent to the ground plane layer used by the device
-
The NQG132 10x10x0.85mm dual-row 132-ld
package has an inner pad ring which requires blind
assembly. It is recommended that a more active flux
solder paste be used such as Alpha OM-350 solder
paste
from
Cookson
Electronics
(http://www.cooksonsemi.com). Please contact IDT
Inc. for gerber files that contain recommended solder
stencil design.
-
The Exposed thermal Paddle (EP) must be reliably
soldered to board ground plane (GND). The ground
plane should include a 5.5mm x 5.5mm exposed
copper pad under the package for thermal dissipation.
There are recommended thermal vias that must be
present on the PCB directly under the EP. The
thermal vias are 0.3mm – 0.33mm
φ @ 1.3mm pitch
and must be present on the PCB directly under the
EP through all board layers.
-
Layout and PCB design have a significant influence
on the power dissipation capabilities of power
management ICs. This is due to the fact that the
surface mount packages used with these devices rely
heavily on thermally conductive traces or pads, to
transfer heat away from the package. Appropriate PC
layout techniques should then be used to remove the
heat due to device power dissipation. The following
general guidelines will be helpful in designing a board
layout for lowest thermal resistance:
1. PC board traces with large cross sectional
areas remove more heat. For optimum
results, use large area PCB patterns with
wide and heavy (2 oz.) copper traces, placed
on the uppermost side of the PCB.
2. In cases where maximum heat dissipation is
required, use double-sided copper planes
connected with multiple vias.
3. Thermal vias are needed to provide a
thermal path to inner and/or bottom layers of
the PCB to remove the heat generated by
device power dissipation.
4. Where possible, increase the thermally
conducting surface area(s) openly exposed
to moving air, so that heat can be removed
by convection (or forced air flow, if
available).
5.
Do not use solder mask or silkscreen on the
heat dissipating traces/pads, as they
increase the net thermal resistance of the
mounted IC package.
Power Dissipation
and Thermal Requirements
Figure 56. Power Derating Curve (Typical)
The IDTP95020 is offered in a package which has a
maximum power dissipation capability of 2.3W which is
limited by the absolute maximum die junction temperature
specification of 125°C. The junction temperature will rise
based on device power dissipation and the package
thermal resistance. The package will provide a maximum
thermal resistance of 23.5°C/W if the PCB layout and
surrounding devices are optimized as described in the
PCB Layout Considerations section. The techniques as
noted in the PCB Layout section need to be followed when
designing the printed circuit board layout, as well as the
placement of the IDTP95020 IC package in proximity to
other heat generating devices in a given application
design. The ambient temperature around the power IC will
also have an effect on the thermal limits of an application.
The main factors influencing θJA (in the order of
decreasing influence) are PCB characteristics, die or pad
size and internal package construction. θJA not only
depends on the package construction but also the PCB
characteristics upon which it is mounted. Most often in a
still air environment, a significant amount of the heat
generated (60 - 85%) sinks into the PCB. Changing the
design or configuration of the PCB changes the efficiency
of its heat sinking capability and hence changes the θJA.
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| P95020NQG8 | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| P95020ZNQGI8 | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P95020NQG8 | 制造商:Integrated Device Technology Inc 功能描述:Power Management and Control 132-Pin QFN EP T/R 制造商:Integrated Device Technology Inc 功能描述:POWER MANAGEMENT AUDIO & CONTROL - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:Integrates Audio, LED B/Light Pwr Mgt |
| P95020ZDLLG | 制造商:Integrated Device Technology Inc 功能描述:124-LGA - Bulk |
| P95020ZDLLG8 | 制造商:Integrated Device Technology Inc 功能描述:124-LGA - Tape and Reel |
| P95020ZDNQG | 制造商:Integrated Device Technology Inc 功能描述:132-VFQFPN - Bulk |
| P95020ZDNQG8 | 制造商:Integrated Device Technology Inc 功能描述:132-VFQFPN - Tape and Reel |
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