MOTOROLA
MC68349 USER'S MANUAL
2- 3
Table 2-1. Signal Index (Continued)
Signal Name
Mnemonic
Function
Input/
Output
Clock Mode Select/Port B0
MODCK/PORTB0
Selects the source of the internal system clock
upon reset or becomes a parallel I/O port
In/I/O
Crystal Oscillator
EXTAL, XTAL
Connections for an external crystal or oscillator
to the internal oscillator circuit
In, Out
System Clock
CLKOUT
System clock out
Out
External Filter Capacitor
XFC
Connection pin for an external capacitor to filter
the circuit of the phase-locked loop
In
Test Clock
TCK
Provides a clock for IEEE 1149.1 test logic
In
Test Mode Select
TMS
Controls test mode operations
In
Test Data In
TDI
Shifts in instructions and test data
In
Test Data Out
TDO
Shifts out instructions and test data
Out
Breakpoint/Development Serial
Clock
BKPT
Signals a hardware breakpoint to the CPU32+ or
provides background debug mode serial clock
In/—
Freeze
FREEZE
Indicates that the CPU32+ has entered
background debug mode
Out
Instruction Pipe 0/Development
Serial Out
IPIPE0
Used to track movement of words through the
instruction pipeline or provides background
debug mode serial out
Out/Out
Instruction Pipe 1
IPIPE1
Used to track movement of words through the
instruction pipeline
Out
Instruction Fetch/
Development Serial In
IFETCH
Indicates when the CPU32+ is performing an
instruction word prefetch and when the
instruction pipeline has been flushed or provides
background debug mode serial in
Out/In
DMA Request
DREQ2 , DREQ1
Input for requesting a DMA transfer
In
DMA Acknowledge
DACK2 , DACK1
Output that signals an access during DMA
Out
DMA Done
DONE2 , DONE1
Bi-directional signal that indicates the last
transfer
I/O
Serial Clock
SCLK
External serial clock input
In
Serial Crystal Oscillator
X1, X2
Connections for an external crystal to the serial
module internal oscillator circuit
—
Receive Data
RxDA, RxDB
Receiver serial data input
In
Transmit Data
TxDA, TxDB
Transmitter serial data output
Out
Receiver Ready/
FIFO Full/Output 4
R≈RDYA
Indicates receive buffer has a character, the
receiver FIFO buffer is full or becomes a parallel
output
Out/Out/
Out
Transmitter Ready/Output 6
T≈RDYA
Indicates transmit buffer has a character or
becomes a parallel output
Out/Out