![](http://datasheet.mmic.net.cn/120000/MC68349FT16_datasheet_3559370/MC68349FT16_262.png)
6- 2
MC68349 USER’S MANUAL
MOTOROLA
6.2 APPLICATION AREAS
The functionality of the SRAM blocks in the QDMM lends it to a number of possible
application areas. One obvious use is for scratchpad random access memory (RAM) to
hold frequently used variables. A similar use is as a high-speed buffer for storage of data
frames for the DMA controller.
The reprogrammable nature of the QDMM modules aids their use as fast overlay memory
for speeding up accesses to slower main memory. One block could overlay the stack
space for a task which is stack-intensive, for instance. On completion of the task and
deallocation of its corresponding user stack, the associated QDMM memory block could
be reassigned to another task.
Although its name (Quad
Data Memory Module) implies use specifically for data storage,
the QDMM SRAM can be used to store code as well. For instance, critical interrupt service
routines (ISRs), which require a fast, deterministic execution time, can be copied from
slower main memory into the QDMM.
During initial prototype debug, the QDMM memory can serve as a small program and data
area for initial test diagnostics downloaded using background debug mode (BDM). A
functional core based on the MC68349 can be brought up immediately by verifying correct
operation of basic processor resources such as the clock, reset, power and ground
connections, default pullups/pulldowns, and BDM interface. Using this initial debug
platform with an appropriate debug tool (such as the M68ICD32 controller), code can be
downloaded directly to the QDMM to assist debugging of the remainder of the system.
6.3 PROGRAMMING MODEL
Figure 6-1 is a programming model (register map) of the registers in the QDMM. The
ADDR (address) column indicates the offset of the register from the address stored in the
SIM49 MBAR. The FC (function code) column indicates whether a register is restricted to
supervisor access (S) or programmable to exist in either supervisor or user space (S/U).
ADDR
FC
15
8
7
0
C00
S
Module Configuration Register (MCR)
C10
S
QDMM Base Address Register 0 (QBAR0)
C14
S
QDMM Base Address Register 1 (QBAR1)
C18
S
QDMM Base Address Register 2 (QBAR2)
C1C
S
QDMM Base Address Register 3 (QBAR3)
Figure 6-1. Programming Model for the QDMM