11/3/95
SECTION 1: OVERVIEW
UM Rev 1
MOTOROLA
MC68349 USER'S MANUAL
xix
LIST OF ILLUSTRATIONS (Continued)
Figure
Page
Number
Title
Number
8-8
Multidrop Mode Timing Diagram .................................................................. 8-16
8-9
Serial Module Programming Model .............................................................. 8-19
8-10
Serial Module Programming Flowchart ........................................................ 8-43
9-1
Test Access Port Block Diagram.................................................................. 9-2
9-2
TAP Controller State Machine ...................................................................... 9-3
9-3
Output Latch Cell (O.Latch) ......................................................................... 9-7
9-4
Input Pin Cell (I.Pin) ..................................................................................... 9-7
9-5
Active-High Output Control Cell (IO.Ctl1)..................................................... 9-8
9-6
Active-Low Output Control Cell (IO.Ctl0) ..................................................... 9-8
9-7
Bidirectional Data Cell (IO.Cell) ................................................................... 9-9
9-8
General Arrangement for Bidirectional Pins ................................................. 9-9
9-9
Bypass Register ........................................................................................... 9-11
10-1
Minimum System Configuration Block Diagram ........................................... 10-1
10-2
Sample Crystal Circuit .................................................................................. 10-2
10-3
Statek Corporation Crystal Circuit ................................................................ 10-2
10-4
XFC and VCCSYN Capacitor Connections.................................................. 10-3
10-5
SRAM Interface ............................................................................................ 10-4
10-6
ROM Interface .............................................................................................. 10-4
10-7
Serial Interface ............................................................................................. 10-5
10-8
Access Time Computation Diagram ............................................................. 10-6
10-9
Signal Relationships to CLKOUT ................................................................. 10-7
10-10
Signal Width Specifications .......................................................................... 10-7
10-11
Skew between Two Outputs......................................................................... 10-8
10-12
Circuitry for Interfacing 8-Bit Device to
16-Bit Memory in Single-Address DMA Mode .............................................. 10-10
11-1
Drive Levels and Test Points for AC Specifications ..................................... 11-4
11-2
Read Cycle Timing Diagram ........................................................................ 11-11
11-3
Write Cycle Timing Diagram......................................................................... 11-12
11-4
Fast Termination Read Cycle Timing Diagram ............................................ 11-13
11-5
Fast Termination Write Cycle Timing Diagram ............................................ 11-14
11-6
Bus Arbitration Timing—Active Bus Case .................................................... 11-15
11-7
Bus Arbitration Timing—Idle Bus Case ........................................................ 11-16
11-8
Show Cycle Timing Diagram ........................................................................ 11-16
11-9
IACK Cycle Timing Diagram......................................................................... 11-17
11-10
Background Debug Mode Serial Port Timing ............................................... 11-18
11-11
Background Debug Mode FREEZE Timing ................................................. 11-18
11-12
DMA Signal Timing Diagram ........................................................................ 11-19
11-13
Serial Module General Timing Diagram ....................................................... 11-20
11-14
Serial Module Asynchronous Mode Timing (X1) .......................................... 11-21