參數(shù)資料
型號(hào)： MB86860
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 200 MHz, RISC PROCESSOR, PBGA352
封裝： PLASTIC, BGA-352
文件頁數(shù)： 60/70頁
文件大?。?/td> 1395K
代理商： MB86860
Specifications subject to changes without prior notice
71
MB86860 SPARClite
BCLK
(input)
--------
PLL Bypass Clock. This signal can be used for test purpose only. When BEN# has
been set to “L” and is in Bypass Mode, clocks are provided to the CPU core from this
pin. It should normally be fixed to “H”.
PLLCEN#
(input)
--------
PLLCLK Enable. This signal can be used for test purpose only. If “L” is input to this
pin, it outputs a PLL clock to the PLLCLK pin. Should normally be fixed to “H”.
NCTEST#
(input)
--------
Test Pin. Should normally be fixed to “H”.
FLOAT#
(input)
--------
Pin Float. This is a control signal to force all output pin to tri-state. If this pin is tied
to “L”, CPU sets all output pins and bi-directional pins to High-Z state.
TEST1 (input)
--------
Test Pin. Should normally be fixed to “H”.
TEST2 (input)
--------
Test Pin. Should normally be fixed to “H”.
O(V)
:
Circuit is operating and outputting valid levels.
O(X)
:
Output is undefined.
O(Z)
:
Output pin is High-Z.
O(H)
:
Outputs “H”.
O(L)
:
Outputs “L”.
I(Z)
:
Input status and High-Z.
相關(guān)PDF資料
PDF描述
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