參數(shù)資料
型號(hào)： MB86860
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 200 MHz, RISC PROCESSOR, PBGA352
封裝： PLASTIC, BGA-352
文件頁(yè)數(shù)： 14/70頁(yè)
文件大?。?/td> 1395K
代理商： MB86860
Specifications subject to changes without prior notice
22
MB86860 SPARClite
3.14. DMSAR[0:1] : DMA Source Address Register
DMA source address registers are used to specify DMA transfer source addresses. These registers are assigned to
0x80000c08 (DMSA0 for Channel 0) and 0x80000c28 (DMSA1 for Channel 1). The setting unit is burst length (32 bytes).
Transfer source ASI is specified by the lower order 4 bits.
31
5
4
3
0
Source address
R
ASI
Address: 0x80000C08 (ASI=0x4)
DMSAR0
Address: 0x80000C28 (ASI=0x4)
DMSAR1
Reset State: 0x00000000
Figure 3-17 DMSAR Register
bit31-5:
Source address
bit4:
Reserved
bit3-0:
ASI<3:0>
3.15. DMDAR[0:1] : DMA Destination Address Register
DMA destination address registers are used to specify DMA transfer destination addresses. These registers are
assigned to 0x80000c10 (DMDA0 for Channel 0) and 0x80000c30 (DMDA1 for Channel 1). The setting unit is burst length
(32 bytes). Transfer destination ASI is specified by the lower order 4 bits.
31
5
4
3
0
Destination address
R
ASI
Address: 0x80000C10 (ASI=0x4)
DMDAR0
Address: 0x80000C30 (ASI=0x4)
DMDAR1
Reset State: 0x00000000
Figure 3-18 DMDAR Register
bit31-5:
Destination address
bit4:
Reserved
bit3-0:
ASI<3:0>
3.16. DMWL[0:1] : DMA Word Length Register
DMA word length registers specify the number of DMA transfer data. These registers are assigned to 0x80000c18
(DMWL0 for Channel 0) and 0x80000c38 (DMWL1 for Channel 1). The setting unit is burst length (32 bytes).
31
16
15
0
LWL
WL
Address: 0x80000C18 (ASI=0x4)
DMWL0
Address: 0x80000C38 (ASI=0x4)
DMWL1
Reset State: 0x00000000
Figure 3-19 DMWL Register
bit31-16: Left Word Length [LWL]
bit15-0:
Word Length [WL]
3.17. IDR : ID Register
ID registers store ID numbers for identifying processors. Read values are “0x0860XXXX”, and the lower order 16 bits
are undefined. This register is Read Only.
31
0
ID
Address: 0x80000ff0 (ASI=0x4)
IDR
Reset State: 0x0860XXXX
Figure 3-20 IDR Register
bit31-0:
ID (Value is 0x0860XXXX)
相關(guān)PDF資料
PDF描述
MB86931-20ZF-G 32-BIT, 20 MHz, RISC MICROCONTROLLER, CQFP256
MB86931-40ZF-G 32-BIT, 40 MHz, RISC MICROCONTROLLER, CQFP256
MB86933H-20PF-G 32-BIT, 20 MHz, RISC PROCESSOR, PQFP160
MB86934-60ZF 32-BIT, 60 MHz, RISC PROCESSOR, CQFP256
MB86936-25/50-PFV-G 32-BIT, 25 MHz, RISC PROCESSOR, PQFP208
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB86930-30ZF-G-BND 制造商:FUJITSU 功能描述:
MB86941 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Peripheral LSI for SPARClite
MB86941PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Peripheral LSI for SPARClite
MB86942 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Peripheral LSI for SPARClite
MB86942PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Peripheral LSI for SPARClite
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*