參數(shù)資料
型號： MB86860
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 200 MHz, RISC PROCESSOR, PBGA352
封裝： PLASTIC, BGA-352
文件頁數(shù)： 24/70頁
文件大?。?/td> 1395K
代理商： MB86860
Specifications subject to changes without prior notice
34
MB86860 SPARClite
5.3.5. SDRAM Bus Connections with SDRAM
5.3.5.1. Addresses
SS200 address output pin connections with SDRAM address input pins for each operating mode are shown here.
Table 5-5 SDRAM Addresses
SDRAM
S200 Pin Names
SBA1
SBA0
SAD1
2
SAD1
1
SAD10-0
256Mbit
8Mwordx8bitx4bank
A14
A13
A12
A11
A10-0
This feature are
(T.B.D.)
4Mwordx16bitx4bank
A14
A13
A12
A11
A10-0
reserved for
2Mwordx32bitx4bank
A13
A12
-
A11
A10-0
future
expansion.
128Mbit
4Mwordx8bitx4bank
A13
A12
-
A11
A10-0
(T.B.D.)
2Mwordx16bitx4bank
A13
A12
-
A11
A10-0
1Mwordx32bitx4bank
A12
A11
-
A10-0
64Mbit
2Mwordx8bitx4bank
A13
A12
-
A11
A10-0
1Mwordx16bitx4bank
A13
A12
-
A11
A10-0
512Kwordx32bitx4bank
A12
A11
-
A10-0
16Mbit
1Mwordx8bitx4bank
-
A11
-
A10-0
512Kwordx16bitx2bank
-
A11
-
A10-0
5.3.5.2. SDRAM Data Mask (SDQM)
Correspondence of each SDRAM data mask (SDQM) with SDRAM data is shown here.
Table 5-6 SDRAM Data Mask
Bus Size
SDQ
<63:56>
<55:48>
<47:40>
<39:32>
<31:24>
<23:16>
<15:8>
<7:0>
64bit mode
SDQM0
SDQM1
SDQM2
SDQM3
SDQM4
SDQM5
SDQM6
SDQM7
32bit mode
NC
SDQM4
SDQM5
SDQM6
SDQM7
5.3.5.3. SDRAM Parity
Correspondence of each SDRAM parity bit with SDRAM data is shown here.
Table 5-7 SDRAM Parity
Bus Size
SDQ
<63:56>
<55:48>
<47:40>
<39:32>
<31:24>
<23:16>
<15:8>
<7:0>
64bit mode
SDP0
SDP1
SDP2
SDP3
SDP4
SDP5
SDP6
SDP7
32bit mode
NC
SDP4
SDP5
SDP6
SDP7
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