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參數(shù)資料
| 型號(hào)： | MB86860 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA352 |
| 封裝： | PLASTIC, BGA-352 |
| 文件頁(yè)數(shù)： | 32/70頁(yè) |
| 文件大?。?/td> | 1395K |
| 代理商： | MB86860 |
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Specifications subject to changes without prior notice
44
MB86860 SPARClite
5.3.6.3. RAS Output Spaces
RA2
AP
SADR
SCLK
D0
64bit Bus
SDQ
ACTV
PRE
DQM
CMD
D0
Bank1
Bank0
SBA
RA1
Write
tRRD
ACTV
tRP
PRE
tRAS
CA2
AP
Write
CA1
5.3.6.4. Timing from Write to Read
5.3.6.5. Initialization
The SDRAM I/F performs the following operations following cancellation of a RESET signal to the SS200.
(1) Transmits a nop to SDRAM in an interval of 200
s (at 100mhz).
(2) Issues a PALL command to SDRAM and precharges all SDRAM banks.
(3) Issues an auto-refresh command (REF) to SDRAM.
(4) Performs (2)~(3) for all CS.
(5) Recognizes that a write operation to the SDRAM Configuration Register (SDCFG) has been performed and issues a
Mode Register Set (MRS) command to SDRAM.
(6) Sets “1” to the SDRAM Initial Wait Indicator (SDI) of the SDRAM Status Register (SSR).
SCLK
D0
64bit Bus
SDQ
Write
tWR
CMD
Read
D0
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| MB86930-30ZF-G-BND | 制造商:FUJITSU 功能描述: |
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| MB86942 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Peripheral LSI for SPARClite |
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