- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370847 > M37640E8 (Mitsubishi Electric Corporation) SINGLE-CHIP 8-BIT CMOS MICROCONTROLLER PDF資料下載
參數(shù)資料
| 型號(hào)： | M37640E8 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCONTROLLER |
| 中文描述： | 單芯片8位CMOS單片機(jī) |
| 文件頁(yè)數(shù)： | 73/172頁(yè) |
| 文件大?。?/td> | 1193K |
| 代理商： | M37640E8 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)當(dāng)前第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)
7600 Series
Mitsubishi Microcomputer
M37640E8-XXXF Preliminary Specification
Universal Serial Bus
7/9/98
2-61
INXCSR7
(AUTO_SET): If the CPU sets this bit to a “1”, the IN_PKT_RDY bit is set automatically
by the USB FCU after the number of bytes of data equal to the maximum packet size (MAXP) is
written into the IN FIFO (see Chapter 2.9.3.1. IN (Transmit) FIFOs for details).
Figure 2-75. USB Endpoints x IN CSR
All bits in
USB Endpoint 0 OUT CSR
(Control & Status Register), shown in Figure 2-76, are
reserved (all control and status info is in Endpoint 0 IN CSR)
Figure 2-76. USB Endpoint 0 OUT CSR
The
USB Endpoint x OUT CSR
(Control & Status Register), shown in Figure 2-77, contains control
and status information of the respective OUT endpoint 1-4. The specific endpoint is selected by the
USB Endpoint Index Register.
OUTXCSR0
(OUT_PKT_RDY): The USB FCU sets the this bit to a “1” after it successfully receives a
packet of data from the host. This bit is cleared by the CPU or by the USB FCU after a packet of data
is unloaded from the FIFO (See Chapter 2.9.3.2. Out (Receive) FIFOs for details).
OUTXCSR1
(OVER_RUN): This bit is used in ISO mode only to indicate to the CPU that a FIFO overrun
has occurred. The USB FCU sets this bit to a “1” at the beginning of an OUT token if the
OUTXCSR0 (OUT_PKT_RDY) bit is not cleared. Setting this bit will cause the INST12 bit of the
Interrupt Status Register 2 to set. The CPU writes a “0” to clear this bit.
OUTXCSR2
(SEND_STALL): The CPU writes a “1” to this bit when the endpoint is stalled (receiver
halt). The USB FCU returns a STALL handshake while this bit is set. The CPU writes a “0” to clear
this bit.
OUTXCSR3
(ISO): The CPU sets this bit to a “1” to initialize the respective endpoint as an Isochronous
endpoint for OUT transactions.
INXCSR0
IN_PKT_RDY Bit (bit 0) (Write “1” only or Read)
0: In packet is not ready
1: In packet is ready
UNDER_RUN Flag (bit 1) (Write “0” only or Read)
0: No FIFO underrun
1: FIFO underrun has occurred
SEND_STALL Bit (bit 2)
0: No action
1: Stall IN Endpoint X by the CPU
ISO Bit (bit 3)
0: Select non-isochronous transfer
1: Select isochronous transfer
INTPT Bit (bit 4)
0: Select non-rate feedback interrupt transfer
1: Select rate feedback interrupt transfer
TX_NOT_EPT Flag (bit 5) (Read Only - Write “0”)
0: Transmit FIFO is empty
1: Transmit FIFO is not empty
FLUSH Bit (bit 6) (Write Only - Read “0”)
0: No action
1: Flush the FIFO
AUTO_SET Bit (bit 7)
0: AUTO_SET disabled
1: AUTO_SET enabled
INXCSR1
INXCSR2
INXCSR3
INXCSR4
INXCSR5
INXCSR6
INXCSR7
MSB
7
LSB
0
INXCSR7
INXCSR6
INXCSR5
INXCSR4
INXCSR3
INXCSR1
INXCSR0
Access: R/W
Reset: 00
16
INXCSR2
Address: 0059
16
Bits 7:0
Reserved (Read “0”)
MSB
7
LSB
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Access: R
Reset: 00
16
Address: 005A
16
Reserved
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37641F8-XXXFP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641F8-XXXHP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641M8-XXXFP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641M8 | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641F8FP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37640E8FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37640E8FS | 功能描述:EPROM MCU/8BIT CMOS EMULATION CH RoHS:否 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 配件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 附件類型:適配器板 適用于相關(guān)產(chǎn)品:RCB230，RCB231，RCB212 配用:26790D-ND - RCB BREAKOUT BOARD RS232 CABLE |
| M37640M4T | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37640M8-111FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37640M8-126FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。