參數(shù)資料
型號: M37640E8
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCONTROLLER
中文描述: 單芯片8位CMOS單片機
文件頁數(shù): 105/172頁
文件大?。?/td> 1193K
代理商: M37640E8
2-93
7/9/98
UART
7600 Series
M37640E8-XXXF Preliminary Specification
Mitsubishi Microcomputers
2.14.2 UART Mode Register
UxMOD defines data formats and selects the clock to be used (see Figure 2-109).
Figure 2-109. UxMOD Register
Table 2-5. SCSGCLK, Prescaler, and UxBRG settings for common baud rates when
Φ
= 12MHz
Baud Rate
(Hz)
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200.
9600
14400
19200
28800
31250
38400
57600
115200
SCSG
(Hex)
bypassed
bypassed
4E
AC
bypassed
bypassed
18
bypassed
18
bypassed
18
18
18
18
18
18
23
18
bypassed bypassed
23
bypassed bypassed
0B
SCSG2
(Hex)
95
63
43
37
31
18
0B
18
13
18
13
13
0E
13
0E
09
00
00
SCSGCLK Rate
(Hz)
80000.00
120000.00
174236.78
213047.07
240000.00
480000.00
960000.00
480000.00
576000.00
480000.00
576000.00
576000.00
768000.00
576000.00
768000.00
1152000.00
11666666.66
11520000.00
12000000.00
11666666.66
12000000.00
11000000.00
Prescaler(Hex)
63
63
62
62
63
63
63
18
13
0E
0E
09
09
04
04
04
25
18
17
12
0C
05
Actual Baud Rate
(Hz)
50.00
75.00
110.00
134.50
150.00
300.00
600.00
1200.00
1800.00
2000.00
2400.00
3600.00
4800.00
7200.00
9600.00
14400.00
19188.60
28800.00
31250.00
38377.19
57692.31
114583.33
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
1/1
00
00
MSB
7
LSB
0
LE1
LE0
PEN
PMD
STB
PS0
CLK
CLK
UART Clock Selection Bit (bit 0)
0:
Φ
1: SCSGCLK
Internal Clock Prescaling Selection Bits (bits 2,1)
Bit 2
Bit 1
0
0:
0
1:
1
0:
1
1:
Stop Bits Selection Bit (bit 3)
0: 1
1: 2
Parity Selection Bit (bit 4)
0: Even
1: Odd
Parity Enable Bit (bit 5)
0: Off
1: On
Uart Character Length Selection Bits (bits 7,6)
Bit 7
Bit 6
0
0:
0
1:
1
0:
1
1:
PS1,0
Division by 1
Division by 8
Division by 32
Division by 256
STB
PMD
PEN
LE1,0
7 bits/character
8 bits/character
9 bits/character
Reserved
Access: R/W
Reset: 00
16
PS1
Address: 0030
16
, 0038
16
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