
2-102
7/9/98
Serial I/O
7600 Series
M37640E8-XXXF Preliminary Specification
Mitsubishi Microcomputers
2.15 Serial I/O
The Serial I/O has the following main features:
Synchronous transmission or reception
Handshaking via SRDY output signal
8-bit character length
Interrupt after transmission or reception
Internal Clock (When serial I/O synchronous clock select bit is “1”, internal clock source divided by
2, 4, 8, 16, 32, 64, 128, 256 can be selected). If bit 1 of SIO Control Register2 is “0”, internal
clock source =
Φ
; if bit 1 of SIO Control Register2 is “1”, internal clock source = SCSGCLK.)
External Clock (When SIO synchronous clock select bit is “1”, an external clock input from the
SCLK pin is selected).
A block diagram of the clock synchronous SIO is shown in Figure 2-116.
2.15.1 SIO Control Register
The Serial I/O Control Register controls the various SIO functions (see Figure 2-117.). All of this
register's bits can be read from and written to by software. At reset, this register is cleared to 00
16
.
The SIO Control Register determines whether the device’s pins are used as ordinary I/O ports or as
SIO function pins. This register also determines the transfer direction and transfer clock for serial data.
2.15.2 SIO Operation
An internal clock or an external clock can be selected as the synchronous clock. When the internal
clock is chosen, dividers are built in to provide eight different clock selections. The start of a transfer
is initiated by a write signal to the SIO shift register (address 002A
16
). The SRDY signal then drops
active low. On the negative edge of the transfer clock SRDY returns high and the data is transmitted
out the STXD pin. Data is latched in from the SRXD pin on the rising edge of the transfer clock. If
an internal clock is selected, the STXD pin enters a high-impedance state after an 8-bit transfer is
completed. If an external clock is selected, the contents of the serial I/O register continue to be shifted
while the send/receive clock is being input. Therefore, the clock needs to be controlled by the
external source. Also there is no STXD high-impedance function after data is transferred.
Address
Description
Acronym and
Value at Reset
002A
16
002B
16
002C
16
SIO shift register
SIO control register 1
SIO control register 2
SIOSHT=XX
SIOCON1=00
SIOCON2=00
Name
Pin
SRDY
SCLK
SRXD
STXD
is multiplexed with P8
0
is multiplexed with P8
1
is multiplexed with P8
2
is multiplexed with P8
3