參數(shù)資料
型號: M37640E8
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCONTROLLER
中文描述: 單芯片8位CMOS單片機
文件頁數(shù): 23/172頁
文件大?。?/td> 1193K
代理商: M37640E8
7600 Series
Mitsubishi Microcomputer
M37640E8-XXXF Preliminary Specification
Oscillator Circuit
7/9/98
2-11
2.3.2
Frequency Synthesizer Circuit
The Frequency Synthesizer Circuit generates a 48MHz clock needed by the USB block and a clock
f
SYN
that are both a multiple of the external input reference clock f
IN
. A block diagram of the circuit
is shown in Figure 2-8.
Figure 2-8. Frequency Synthesizer Circuit
The frequency synthesizer consists of a prescaler, frequency multiplier macro, a frequency divider
macro, and four registers, namely FSM1, FSM2, FSC and FSD. Two multiply registers (FSM1, FSM2)
control the frequency multiply amount. Clock f
IN
is prescaled using FSM2 to generate f
PIN
. f
PIN
is
multiplied using FSM1 to generate an f
VCO
clock which is then divided using FSD to produce the
clock f
SYN
. The f
VCO
clock is optimized for 48 MHz operation and is buffered and sent out of the
frequency synthesizer block as signal f
USB
. This signal is used by the USB block.
Clock f
PIN
is a divided down version of clock f
IN
, which can be either f
Xin
or f
XCin
. The default clock
after reset is f
Xin
. The relationship between f
PIN
and the clock input to the prescaler (f
IN
) is as
follows:
f
PIN
= f
IN
/ 2(n+1) where n is a decimal number between 0 and 254. Setting FSM2 to 255
disables the prescaler and f
PIN
= f
IN
.
Figure 2-9. Frequency Synthesizer Multiply Control Register FSM2
Data Bus
FSM2
FSM1
FSC
FSD
006E
006D
006C
006F
Frequency
Multiplier
Frequency
Divider
8
LS
8 Bit
f
IN
f
VCO
f
SYN
f
USB
Prescaler
8
f
PIN
f
IN
/2(
n
+1) = f
PIN
f
PIN
FSM2
f
IN
Dec(n)
Hex(n)
24 MHz
255
FF
24.00 MHz
1 MHz
11
0C
24.00 MHz
2 MHz
5
05
24.00 MHz
3 MHz
3
03
24.00 MHz
6 MHz
1
01
24.00 MHz
12 MHz
0
00
24.00 MHz
MSB
7
LSB
0
Bit 6
Bit 1
Bit 0
Bit 2
Bit 5
Bit 4
Bit 3
Bit 7
Access: R/W
Address: 006E
16
Reset: FF
16
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