參數(shù)資料
型號: L84225
英文描述: L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02
中文描述: L84225 100BaseTX/FX/10BaseT物理層設(shè)備的技術(shù)手冊,4月2日
文件頁數(shù): 42/118頁
文件大小: 890K
代理商: L84225
42 of 118
April, 2002
L84225 Quad 100BaseTX/FX/10BaseT Phys. Layer Device - Technical Manual
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
Figure 8
NLP vs. FLP Link Pulse
The AutoNegotiation algorithm is initiated by any of the following events:
Powerup
Device Reset
AutoNegotiation Reset
Entering the Link Fail state
Once a negotiation has been initiated, the L84225 first determines if the
remote device has AutoNegotiation capability. If the device is not
AutoNegotiation capable and is just transmitting either a 10Base-T or
100Base-TX signal, the L84225 will sense that and place itself in the
correct mode. If the L84225 detects FLP’s from the remote device, then
the remote device is determined to have AutoNegotiation capability and
the device then uses the contents of the MI serial port AutoNegotiation
Advertisement register and FLP’s to advertise it’s capabilities to a remote
device. The remote device does the same, and the capabilities read back
from the remote device are stored in the MI serial port AutoNegotiation
Remote End Capability register. The L84225 negotiation algorithm then
matches it’s capabilities to the remote devices capabilities and
determines to what mode the device should be configured according to
the priority resolution algorithm defined in IEEE 802.3 Clause 28. Once
the negotiation process is completed, the L84225 then configures itself
for either 10 or 100 Mbps mode and either Full or Half Duplex modes
(depending on the outcome of the negotiation process), and it switches
a. Normal Link Pulse (NLP)
TX_DI
±
TX_DI
±
b. Fast Link Pulse (FLP)
Clock Clock Clock Clock Clock Clock Clock
Data Data
Data Data Data
Data
D0
D1
D2
D3
D14
D15
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