參數(shù)資料
型號: L84225
英文描述: L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02
中文描述: L84225 100BaseTX/FX/10BaseT物理層設(shè)備的技術(shù)手冊,4月2日
文件頁數(shù): 13/118頁
文件大?。?/td> 890K
代理商: L84225
Functional Description
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
13 of 118
April, 2002
2 Functional Description
2.1 General
The L84225 is a complete 10/100 Mbps Ethernet Media Interface IC. The
L84225 has four separate and independent channels. Each channel has
the following main sections: controller interface, encoder, decoder,
scrambler, descrambler, clock and data recovery, twisted pair and fiber
interface transmitter, twisted pair and fiber interface receiver, and auto
negotiation. A Management Interface (MI) serial port, which provides
access to eleven registers for each channel, is common to all four
channels.
Figure 1
shows the L84225 block diagram.
The L84225 can operate as a 100BaseTX or 100BaseFX device (100
Mbps mode) or as a 10BaseT device (10 Mbps mode). The 100 Mbps
and 10 Mbps modes differ in data rate, signaling protocol, and allowed
wiring as follows:
The 100 Mbps FX mode uses two fiber connections with 4B5B
encoded NRZI 125 MHz binary data through an ECL-type driver to
achieve a throughput of 100 Mbps.
The 100 Mbps TX mode uses two pairs of category 5, or better, UTP
or STP twisted pair cable with 4B5B encoded, scrambled, and MLT3
coded (ternary) 125 MHz data to achieve a throughput of 100 Mbps.
The 10 Mbps mode uses two pairs of category 3, or better, UTP or
STP twisted pair cable with Manchester encoded 10 MHz binary data
to achieve a 10 Mbps thruput.
The data symbol format on the fiber or twisted pair cable for the 100 and
10 Mbps modes is defined in IEEE 802.3 specifications and shown in
Figure 2
.
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