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參數(shù)資料
| 型號(hào)： | L84225 |
| 英文描述： | L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02 |
| 中文描述： | L84225 100BaseTX/FX/10BaseT物理層設(shè)備的技術(shù)手冊，4月2日 |
| 文件頁數(shù)： | 33/118頁 |
| 文件大?。?/td> | 890K |
| 代理商： | L84225 |
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Functional Description
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
33 of 118
April, 2002
The receiver goes into the unsquelch state if the input voltage
exceeds the squelch levels for three bit times with alternating polarity
within a 50-250 ns interval.
The receiver goes into the squelch state when SOI is detected.
Unsquelch detection has no affect on link integrity, link pulses are
used for that in 10 Mbps mode.
Start of packet is determined when the receiver goes into the
unsquelch state and CRS is asserted.
The receiver meets the squelch requirements defined in IEEE 802.3
Clause 14.
2.9.5 Receive Level Adjust
The receiver squelch and unsquelch levels can be lowered by 4.5 dB by
setting the receive level adjust bit in the MI serial port Channel
Configuration register. By setting this bit, the device can support cable
lengths exceeding 100 meters.
2.10 Fiber Interface
2.10.1 General
The Fiber Interface implements the 100BaseFX function defined in IEEE
802.3.
The Fiber Interface consists of three signals: (1) a differential PECL data
output (FXOP/FXON), (2) a differential PECL data input (FXIP/FXIN),
and (3) a PECL signal detect (SD/FXEN).
The Fiber Interface section consists of four blocks: (1) transmitter, (2)
receiver, (3) signal detect, and (4) far end fault.
The Fiber Interface can be independently selected for each channel with
the SD/FXEN_[3:0] pins.
The Fiber Interface is disabled in 10Mbps mode. AutoNegotiation and the
scrambler/descrambler are disabled when the Fiber Interface is enabled.
The Fiber Interface meets all IEEE 802.3 requirements.
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