參數(shù)資料
型號: L84225
英文描述: L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02
中文描述: L84225 100BaseTX/FX/10BaseT物理層設(shè)備的技術(shù)手冊,4月2日
文件頁數(shù): 12/118頁
文件大小: 890K
代理商: L84225
1
L
A
C
Figure 1
L84225 Block Diagram
ANEG
SPEED_[3:0]
DPLX_[3:0]
AD_REV
REPEATER
RESET
CLKIN
Global
MDC
MDIO
PHYAD[4:2]
REGDEF
Serial
Port
(MI)
Interface
TXD[3:0]_3
TXEN_3
RXD[3:0]_3
CRS_3
RXDV_3
LED3_3
LED2_3
LED1_3
LED0_3
LED
Drivers
4B5B
Encoder
Scrambler
MLT3
Encoder
Current
Source
Clock
Generator
LP
Filter
100BaseFX Transmitter
ROM
DAC
Clock
Generator
LP
Filter
+
4B5B
Decoder
Descrambler
Clock
& Data
Recovery
Squelch
+
Auto-
& Link
Negotiation
MLT3
Decoder
Adaptive
Equalizer
Squelch
LP
Filter
REXT
TPOP_3
TPON
_
3
TPIP_3
TPIN
_3
+
100BaseTX Receiver
±
Vth
10BaseTX Receiver
+
+
Recovery
(Manchester
Decoder)
Clock & Data
Channel 3
Channel 2
Channel 1
Channel 0
Manchester
Encoder
Per Channel Functions
10BaseT Transmitter
RXER_3/RXD4_3
Controller
Global
LEDDEF
Collision
+
NRZI
Encoder
+
NRZI
Decoder
+
100BaseFX Receiver
+
Vth
±
Vth
SD/FXEN_3
TXCLK_3
TXER_3/TXD4_3
COL_3
RXCLK_3
SD_THR
100BaseTX Transmitter
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