參數(shù)資料
型號(hào)： CY7C67200
廠商： Cypress Semiconductor Corp.
英文描述： EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller(EZ-OTG可編程USB On-The-Go主機(jī)/外圍設(shè)備控制器)
中文描述： 的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外設(shè)控制器（的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外圍設(shè)備控制器）
文件頁(yè)數(shù)： 66/82頁(yè)
文件大?。?/td> 1719K
代理商： CY7C67200
CY7C67200
Document #: 38-08014 Rev. *F
Page 66 of 82
Reserved
All reserved bits must be written as ‘0’.
8.11.2
UART Status Register [0xC0E2] [R]
Figure 8-79. UART Status Register
Register Description
The UART Status register is a read only register that indicates the status of the UART buffer.
Receive Full
(Bit 1)
The Receive Full bit indicates whether the receive buffer is full. It can be programmed to interrupt the CPU as interrupt #5 when
the buffer is full. This can be done though the UART bit of the Interrupt Enable register (0xC00E). This bit will automatically be
cleared when data is read from the UART Data register.
1:
Receive buffer full
0:
Receive buffer empty
Transmit Full
(Bit 0)
The Transmit Full bit indicates whether the transmit buffer is full or not. It can be programmed to interrupt the CPU as interrupt
#4 when the buffer is empty. This can be done though the UART bit of the Interrupt Enable register (0xC00E). This bit will
automatically be set to ‘1’ after data is written by EZ-Host to the UART Data register (to be transmitted). This bit will automatically
be cleared to ‘0’ after the data is transmitted.
1:
Transmit buffer full (transmit busy)
0:
Transmit buffer is empty and ready for a new byte of data
8.11.3
UART Data Register [0xC0E4] [R/W]
Figure 8-80. UART Data Register
Register Description
The UART Data register contains data to be transmitted or received from the UART port. Data written to this register will start a
data transmission and also causes the UART Transmit Empty Flag of the UART Status register to set. When data received on
the UART port is read from this register, the UART Receive Full Flag of the UART Status register will get cleared.
Data
(Bits [7:0])
The Data field is where the UART data to be transmitted or received is located
Reserved
All reserved bits must be written as ‘0’.
Bit #
15
14
13
12
11
10
9
8
Field
Reserved...
Read/Write
-
-
-
-
-
-
-
-
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
...Reserved
Receive Full
Transmit Full
Read/Write
-
-
-
-
-
-
R
R
Default
0
0
0
0
0
0
0
0
Bit #
15
14
13
12
11
10
9
8
Field
Reserved
Read/Write
-
-
-
-
-
-
-
-
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
Data
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
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參數(shù)描述
CY7C672001-48BAXI 功能描述:8位微控制器 -MCU CY7C672001-48BAXI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
CY7C672001-48BAXIT 功能描述:8位微控制器 -MCU CY7C672001-48BAXIT RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
CY7C67200-48BAXI 功能描述:USB 接口集成電路 LO PWR OTG IND RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C67200-48BAXIT 功能描述:USB 接口集成電路 LO PWR OTG IND RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C67300-100AI 制造商:Cypress Semiconductor 功能描述:INTERFACE MISC
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