參數(shù)資料
型號: CY7C67200
廠商: Cypress Semiconductor Corp.
英文描述: EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller(EZ-OTG可編程USB On-The-Go主機(jī)/外圍設(shè)備控制器)
中文描述: 的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外設(shè)控制器(的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外圍設(shè)備控制器)
文件頁數(shù): 18/82頁
文件大?。?/td> 1719K
代理商: CY7C67200
CY7C67200
Document #: 38-08014 Rev. *F
Page 18 of 82
8.2.2
Timer 0 Register 0xC010
Timer 1 Register 0xC012
Timer n Register [R/W]
Figure 8-12. Timer n Register
Register Description
The Timer n Register sets the Timer n count. Both Timer 0 and Timer 1 decrement by one every 1 μs clock tick. Each can provide
an interrupt to the CPU when the timer reaches zero.
Count
(Bits [15:0])
The Count field sets the Timer count.
8.3
There is one set of register dedicated to general USB control. This set consists of two identical registers, one for Host/Device
Port 1 and one for Host/Device Port 2. This register set has functions for both USB host and USB peripheral options and is covered
in this section and summarized in
Figure 8-13
. USB Host-only registers are covered in section 8.4 and USB Device-only registers
are covered in section 8.5.
General USB Registers
8.3.1
USB 1 Control Register 0xC08A
USB 2 Control Register 0xC0AA
USB n Control Register [R/W]
Figure 8-14. USB n Control Register
Register Description
The USB n Control register is used in both host and device mode. It monitors and controls the SIE and the data lines of the USB
ports. This register can be accessed by the HPI interface.
Bit #
15
14
13
12
11
10
9
8
Field
Count...
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
1
1
1
1
1
1
1
1
Bit #
7
6
5
4
3
2
1
0
Field
...Count
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
1
1
1
1
1
1
1
1
Figure 8-13. USB Registers
Register Name
USB n Control Register
Address (SIE1/SIE2)
0xC08A/0xC0AA
R/W
R/W
Bit #
15
14
13
12
11
10
9
8
Field
Reserved
Port A
D+ Status
Port A
D– Status
Reserved
LOA
Mode
Select
Reserved
Read/Write
-
-
R
R
-
R/W
R/W
-
Default
X
X
X
X
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
Port A
Resistors Enable
Reserved
Port A
Force D± State
Suspend
Enable
Reserved
Port A
SOF/EOP Enable
Read/Write
R/W
-
-
R/W
R/W
R/W
-
R/W
Default
0
0
0
0
0
0
0
0
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