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參數(shù)資料
| 型號： | CY7C67200 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller(EZ-OTG可編程USB On-The-Go主機(jī)/外圍設(shè)備控制器) |
| 中文描述： | 的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外設(shè)控制器（的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外圍設(shè)備控制器） |
| 文件頁數(shù)： | 36/82頁 |
| 文件大?。?/td> | 1719K |
| 代理商： | CY7C67200 |
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CY7C67200
Document #: 38-08014 Rev. *F
Page 36 of 82
EP5 Interrupt Enable
(Bit 5)
The EP5 Interrupt Enable bit enables or disables endpoint
seven (EP5) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Time-out occurs, IN
Exception Error, or OUT Exception Error. In addition, the NAK
Interrupt Enable bit in the Device n Endpoint Control register
can also be set so that NAK responses triggers this interrupt.
1:
Enable EP5 Transaction Done interrupt
0:
Disable EP5 Transaction Done interrupt
EP4 Interrupt Enable
(Bit 4)
The EP4 Interrupt Enable bit enables or disables endpoint
seven (EP4) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Time-out occurs, IN
Exception Error, or OUT Exception Error. In addition, the NAK
Interrupt Enable bit in the Device n Endpoint Control register
can also be set so that NAK responses triggers this interrupt.
1:
Enable EP4 Transaction Done interrupt
0:
Disable EP4 Transaction Done interrupt
EP3 Interrupt Enable
(Bit 3)
The EP3 Interrupt Enable bit enables or disables endpoint
seven (EP3) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Time-out occurs, IN
Exception Error, or OUT Exception Error. In addition, the NAK
Interrupt Enable bit in the Device n Endpoint Control register
can also be set so that NAK responses triggers this interrupt.
1:
Enable EP3 Transaction Done interrupt
0:
Disable EP3 Transaction Done interrupt
EP2 Interrupt Enable
(Bit 2)
The EP2 Interrupt Enable bit enables or disables endpoint
seven (EP2) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Time-out occurs, IN
Exception Error, or OUT Exception Error. In addition, the NAK
Interrupt Enable bit in the Device n Endpoint Control register
can also be set so that NAK responses triggers this interrupt.
1:
Enable EP2 Transaction Done interrupt
0:
Disable EP2 Transaction Done interrupt
EP1 Interrupt Enable
(Bit 1)
The EP1 Interrupt Enable bit enables or disables endpoint
seven (EP1) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Time-out occurs, IN
Exception Error, or OUT Exception Error. In addition, the NAK
Interrupt Enable bit in the Device n Endpoint Control register
can also be set so that NAK responses triggers this interrupt.
1:
Enable EP1 Transaction Done interrupt
0:
Disable EP1 Transaction Done interrupt
EP0 Interrupt Enable
(Bit 0)
The EP0 Interrupt Enable bit enables or disables endpoint
seven (EP0) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Time-out occurs, IN
Exception Error, or OUT Exception Error. In addition, the NAK
Interrupt Enable bit in the Device n Endpoint Control register
can also be set so that NAK responses triggers this interrupt.
1:
Enable EP0 Transaction Done interrupt
0:
Disable EP0 Transaction Done interrupt
Reserved
All reserved bits must be written as ‘0’.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C672001-48BAXI | 功能描述:8位微控制器 -MCU CY7C672001-48BAXI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| CY7C672001-48BAXIT | 功能描述:8位微控制器 -MCU CY7C672001-48BAXIT RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| CY7C67200-48BAXI | 功能描述:USB 接口集成電路 LO PWR OTG IND RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C67200-48BAXIT | 功能描述:USB 接口集成電路 LO PWR OTG IND RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C67300-100AI | 制造商:Cypress Semiconductor 功能描述:INTERFACE MISC |
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