參數(shù)資料
型號: CY7C67200
廠商: Cypress Semiconductor Corp.
英文描述: EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller(EZ-OTG可編程USB On-The-Go主機/外圍設備控制器)
中文描述: 的EZ - OTG公司可編程的USB On - The - Go的主機/外設控制器(的EZ - OTG公司可編程的USB On - The - Go的主機/外圍設備控制器)
文件頁數(shù): 55/82頁
文件大?。?/td> 1719K
代理商: CY7C67200
CY7C67200
Document #: 38-08014 Rev. *F
Page 55 of 82
Resume2 Flag
(Bit 7)
The Resume2 Flag bit is a read only bit that indicates if a USB resume interrupt occurs on either Host/Device 2.
1:
Interrupt triggered
0:
Interrupt did not trigger
Resume1 Flag
(Bit 6)
The Resume1 Flag bit is a read only bit that indicates if a USB resume interrupt occurs on either Host/Device 1.
1:
Interrupt triggered
0:
Interrupt did not trigger
SIE2msg
(Bit 5)
The SIE2msg Flag bit is a read only bit that indicates if the CY7C67200 CPU has written to the SIE2msg register. This bit is
cleared on an HPI read.
1:
The SIE2msg register has been written by the CY7C67200 CPU
0:
The SIE2msg register has not been written by the CY7C67200 CPU
SIE1msg
(Bit 4)
The SIE1msg Flag bit is a read only bit that indicates if the CY7C67200 CPU has written to the SIE1msg register. This bit is
cleared on an HPI read.
1:
The SIE1msg register has been written by the CY7C67200 CPU
0:
The SIE1msg register has not been written by the CY7C67200 CPU
Done2 Flag
(Bit 3)
In host mode the Done2 Flag bit is a read only bit that indicates if a host packet done interrupt occurs on Host 2. In device mode
this read only bit indicates if an any of the endpoint interrupts occurs on Device 2. Firmware needs to determine which endpoint
interrupt occurred.
1:
Interrupt triggered
0:
Interrupt did not trigger
Done1 Flag
(Bit 2)
In host mode the Done 1 Flag bit is a read only bit that indicates if a host packet done interrupt occurs on Host 1. In device mode
this read only bit indicates if an any of the endpoint interrupts occurs on Device 1. Firmware needs to determine which endpoint
interrupt occurred.
1:
Interrupt triggered
0:
Interrupt did not trigger
Reset1 Flag
(Bit 1)
The Reset1 Flag bit is a read only bit that indicates if a USB Reset interrupt occurs on either Host/Device 1.
1:
Interrupt triggered
0:
Interrupt did not trigger
Mailbox Out Flag
(Bit 0)
The Mailbox Out Flag bit is a read only bit that indicates if a message is ready in the outgoing mailbox. This interrupt clears when
the external host reads from the HPI Mailbox register.
1:
Interrupt triggered
0:
Interrupt did not trigger
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