參數(shù)資料
型號(hào): CY7C67200
廠商: Cypress Semiconductor Corp.
英文描述: EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller(EZ-OTG可編程USB On-The-Go主機(jī)/外圍設(shè)備控制器)
中文描述: 的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外設(shè)控制器(的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外圍設(shè)備控制器)
文件頁數(shù): 50/82頁
文件大小: 1719K
代理商: CY7C67200
CY7C67200
Document #: 38-08014 Rev. *F
Page 50 of 82
8.9
There are five registers dedicated to HPI operation. In addition, there is an HPI status port which can be address over HPI. Each
of these registers is covered in this section and are summarized in
Figure 8-58
.
HPI Registers
8.9.1
HPI Breakpoint
Register [0x0140] [R]
Figure 8-59. HPI Breakpoint Register
Register Description
The HPI Breakpoint register is a special on chip memory location which the external processor can access using normal HPI
memory read/write cycles. This register is read only by the CPU but is read/write by the HPI port. The contents of this register
have the same effect as the Breakpoint register [0xC014]. This special Breakpoint register is used by software debuggers which
interface through the HPI port instead of the serial port.
When the program counter matches the Breakpoint Address, the INT127 interrupt triggers. To clear this interrupt, a zero value
must be written to this register.
Address
(Bits [15:0])
The Address field is a 16-bit field containing the breakpoint address.
8.9.2
Interrupt Routing Register [0x0142] [R]
Figure 8-60. Interrupt Routing Register
Register Description
The Interrupt Routing register allows the HPI port to take over some or all of the SIE interrupts that usually go to the on-chip CPU.
This register is read only by the CPU but is read/write by the HPI port. By setting the appropriate bit to ‘1’, the SIE interrupt is
routed to the HPI port to become the HPI_INTR signal and also readable in the HPI Status register. The bits in this register select
where the interrupts are routed. The individual interrupt enable is handled in the SIE interrupt enable register.
Figure 8-58. HPI Registers
Register Name
HPI Breakpoint Register
Interrupt Routing Register
SIE1msg Register
SIE2msg Register
HPI Mailbox Register
Address
0x0140
0x0142
0x0144
0x0148
0xC0C6
R/W
R
R
W
W
R/W
Bit #
15
14
13
12
11
10
9
8
Field
Address...
Read/Write
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
...Address
Read/Write
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
Bit #
15
14
13
12
11
10
9
8
Field
VBUS to HPI
Enable
ID to HPI
Enable
SOF/EOP2 to
HPI Enable
SOF/EOP2 to
CPU Enable
SOF/EOP1 to
HPI Enable
SOF/EOP1 to
CPU Enable
Reset2 to HPI
Enable
HPI Swap 1
Enable
Read/Write
R
R
R
R
R
R
R
R
Default
0
0
0
1
0
1
0
0
Bit #
7
6
5
4
3
2
1
0
Field
Resume2 to
HPI Enable
Resume1 to
HPI Enable
Reserved
Done2 to HPI
Enable
Done1 to HPI
Enable
Reset1 to HPI
Enable
HPI Swap 0
Enable
Read/Write
-
-
-
-
-
-
-
-
Default
0
0
0
0
0
0
0
0
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