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參數(shù)資料
| 型號： | CY7C67200 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller(EZ-OTG可編程USB On-The-Go主機(jī)/外圍設(shè)備控制器) |
| 中文描述： | 的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外設(shè)控制器（的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外圍設(shè)備控制器） |
| 文件頁數(shù)： | 54/82頁 |
| 文件大?。?/td> | 1719K |
| 代理商： | CY7C67200 |
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CY7C67200
Document #: 38-08014 Rev. *F
Page 54 of 82
8.9.5
HPI Status Port [] [HPI: R]
Figure 8-63. HPI Status Port
Register Description
The HPI Status Port provides the external host processor with the MailBox status bits plus several SIE status bits. This register
is not accessible from the on-chip CPU. The additional SIE status bits are provided to aid external device driver firmware
development, and are not recommended for applications that do not have an intimate relationship with the on-chip BIOS.
Reading from the HPI Status Port does not result in a CPU HPI interface memory access cycle. The external host may continu-
ously poll this register without degrading the CPU or DMA performance.
VBUS Flag
(Bit 15)
The VBUS Flag bit is a read only bit that indicates whether OTG VBus is greater than 4.4V. After turning on VBUS, firmware
should wait at least 10 μs before this reading this bit.
1:
OTG VBus is greater then 4.4V
0:
OTG VBus is less then 4.4V
ID Flag
(Bit 14)
The ID Flag bit is a read only bit that indicates the state of the OTG ID pin.
SOF/EOP2 Flag
(Bit 12)
The SOF/EOP2 Flag bit is a read only bit that indicates if a SOF/EOP interrupt occurs on either Host/Device 2.
1:
Interrupt triggered
0:
Interrupt did not trigger
SOF/EOP1 Flag
(Bit 10)
The SOF/EOP1 Flag bit is a read only bit that indicates if a SOF/EOP interrupt occurs on either Host/Device 1.
1:
Interrupt triggered
0:
Interrupt did not trigger
Reset2 Flag
(Bit 9)
The Reset2 Flag bit is a read only bit that indicates if a USB Reset interrupt occurs on either Host/Device 2.
1:
Interrupt triggered
0:
Interrupt did not trigger
Mailbox In Flag
(Bit 8)
The Mailbox In Flag bit is a read only bit that indicates if a message is ready in the incoming mailbox. This interrupt clears when
on chip CPU reads from the HPI Mailbox register.
1:
Interrupt triggered
0:
Interrupt did not trigger
Bit #
15
14
13
12
11
10
9
8
Field
VBUS
Flag
ID
Flag
Reserved
SOF/EOP2
Flag
Reserved
SOF/EOP1
Flag
Reset2
Flag
Mailbox In
Flag
Read/Write
R
R
-
R
-
R
R
R
Default
X
X
X
X
X
X
X
X
Bit #
7
6
5
4
3
2
1
0
Field
Resume2
Flag
Resume1
Flag
SIE2msg
SIE1msg
Done2
Flag
Done1
Flag
Reset1
Flag
Mailbox Out
Flag
Read/Write
R
R
R
R
R
R
R
R
Default
X
X
X
X
X
X
X
X
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C672001-48BAXI | 功能描述:8位微控制器 -MCU CY7C672001-48BAXI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| CY7C672001-48BAXIT | 功能描述:8位微控制器 -MCU CY7C672001-48BAXIT RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| CY7C67200-48BAXI | 功能描述:USB 接口集成電路 LO PWR OTG IND RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C67200-48BAXIT | 功能描述:USB 接口集成電路 LO PWR OTG IND RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C67300-100AI | 制造商:Cypress Semiconductor 功能描述:INTERFACE MISC |
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