參數(shù)資料
型號(hào)： CY7C67200
廠商： Cypress Semiconductor Corp.
英文描述： EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller(EZ-OTG可編程USB On-The-Go主機(jī)/外圍設(shè)備控制器)
中文描述： 的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外設(shè)控制器（的EZ - OTG公司可編程的USB On - The - Go的主機(jī)/外圍設(shè)備控制器）
文件頁數(shù)： 42/82頁
文件大小： 1719K
代理商： CY7C67200
CY7C67200
Document #: 38-08014 Rev. *F
Page 42 of 82
8.7.1
GPIO Control Register [0xC006] [R/W]
Figure 8-42. GPIO Control Register
Register Description
The GPIO Control register configures the GPIO pins for
various interface options. It also controls the polarity of the
GPIO interrupt on IRQ0 (GPIO24).
Write Protect Enable
(Bit 15)
The Write Protect Enable bit enables or disables the GPIO
write protect. When Write Protect is enabled, the GPIO Mode
Select [15:8] bits are read only until a chip reset.
1:
Enable Write Protect
0:
Disable Write Protect
SAS Enable
(Bit 11)
The SAS Enable bit, when in SPI mode, reroutes the SPI port
SPI_nSSI pin to GPIO[15] rather then GPIO[9].
1:
Reroute SPI_nss to GPIO[15]
0:
Leave SPI_nss on GPIO[9]
Mode Select
(Bits [10:8])
The Mode Select field selects how GPIO[15:0] and
GPIO[24:19] are used as defined in
Table 8-8
.
HSS Enable
(Bit 7)
The HSS Enable bit routes HSS to GPIO[15:12].
1:
HSS is routed to GPIO
0:
HSS is not routed to GPIO’s. GPIO[15:12] are free for other
purposes.
SPI Enable
(Bit 5)
The SPI Enable bit routes SPI to GPIO[11:8]. If the SAS
Enable bit is set, it overrides and routes the SPI_nSSI pin to
GPIO15.
1:
SPI is routed to GPIO[11:8]
0:
SPI is not routed to GPIO[11:8]. GPIO[11:8] are free for
other purposes.
Interrupt 0 Polarity Select
(Bit 1)
The Interrupt 0 Polarity Select bit selects the polarity for IRQ0.
1:
Sets IRQ0 to rising edge
0:
Sets IRQ0 to falling edge
Interrupt 0 Enable
(Bit 0)
The Interrupt 0 Enable bit enables or disables IRQ0. The GPIO
bit on the interrupt Enable register must also be set in order for
this for this interrupt to be enabled.
1:
Enable IRQ0
0:
Disable IRQ0
Reserved
All reserved bits must be written as ‘0’.
Bit #
15
14
13
12
11
10
9
8
Field
Write Protect
Enable
Reserved
Reserved
SAS
Enable
Mode
Select
Read/Write
R/W
-
R
-
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
HSS
Enable
Reserved
SPI
Enable
Reserved
Interrupt 0
Polarity Select
Interrupt 0
Enable
Read/Write
R/W
-
R/W
-
-
-
R/W
R/W
Default
0
0
0
0
0
0
0
0
Table 8-8. Mode Select Definition
Mode Select
[10:8]
111
110
GPIO Configuration
Reserved
SCAN — (HW) Scan diagnostic. For pro-
duction test only. Not for normal operation
HPI — Host Port Interface
Reserved
Reserved
Reserved
Reserved
GPIO — General Purpose Input Output
101
100
011
010
001
000
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CY7C672001-48BAXI 功能描述:8位微控制器 -MCU CY7C672001-48BAXI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
CY7C672001-48BAXIT 功能描述:8位微控制器 -MCU CY7C672001-48BAXIT RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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