參數(shù)資料
型號(hào)： BX80530C1400512
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 1400 MHz, MICROPROCESSOR, CPGA370
封裝： FLIP CHIP, PGA-370
文件頁(yè)數(shù)： 40/94頁(yè)
文件大?。?/td> 1775K
代理商： BX80530C1400512
Datasheet
37
Intel Pentium III Processor with 512KB L2 Cache at 1.13GHz to 1.40GHz
3.0
Signal Quality Specifications
Signals driven on the processor system bus should meet signal quality specifications to ensure that
the components read data properly and to ensure that incoming signals do not affect the long term
reliability of the component. Specifications are provided for simulation at the processor pins.
Meeting the specifications at the processor pins in Table 21, Table 22, and Table 25 ensures that
signal quality effects will not adversely affect processor operation.
3.1
BCLK/BCLK# & PICCLK Signal Quality Specifications and
Measurement Guidelines
Table 22 describes the signal quality specifications at the processor pins for the processor system
bus clock (BCLK/BCLK#) and APIC clock (PICCLK) signals. References made to BCLK signal
quality specifications also applies to BCLK#. Figure 18 describes the signal quality waveform for
the system bus clock at the processor pins.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Intel Pentium III processors with 512KB L2
cache at all frequencies.
2. The rising and falling edge ringback voltage specified is the minimum (rising) or maximum (falling) absolute
voltage the BCLK/BCLK# and PICCLK signals can dip back to after passing the VIH (rising) or VIL (falling)
voltage limits. This specification is an absolute value.
Table 21. BCLK (Single-Ended Clock Mode) Signal Quality Specifications for Simulation at
the Processor Pins1
T# Parameter
Min
Nom
Max
Unit
Figure
Notes
V1: BCLK VIL
0.3
V
V2: BCLK VIH
2.2
V
V3: BCLK Absolute Voltage Range
-0.5
3.1
V
V4: BCLK Rising Edge Ringback
2.0
V
2
V5: BCLK Falling Edge Ringback
0.5
V
2
Table 22. BCLK/BCLK# (Differential Clock Mode) and PICCLK Signal Quality Specifications
for Simulation at the Processor Pins 1
T# Parameter
Min
Nom
Max
Unit
Figure
Notes
V1: BCLK VIL
-0.2
0.35
V
V1: PICCLK VIL
0.40
V
V2: BCLK VIH
0.92
1.45
V
V2 PICCLK VIH
1.60
V
V3: BCLK Absolute Voltage Range
-0.2
1.45
V
V3: PICCLK Absolute Voltage
Range
-0.4
2.4
V
V4: BCLK Rising Edge Ringback
0.35
V
2
V4: PICCLK Rising Edge Ringback
1.60
V
2
V5: BCLK Falling Edge Ringback
-0.35
V
2
V5: PICCLK Falling Edge Ringback
0.40
V
2
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