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參數(shù)資料
| 型號(hào)： | BX80530C1400512 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 1400 MHz, MICROPROCESSOR, CPGA370 |
| 封裝： | FLIP CHIP, PGA-370 |
| 文件頁(yè)數(shù)： | 14/94頁(yè) |
| 文件大?。?/td> | 1775K |
| 代理商： | BX80530C1400512 |
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Datasheet
13
Intel Pentium III Processor with 512KB L2 Cache at 1.13GHz to 1.40GHz
NOTES:
1. 0 = Processor pin connected to VSS. and 1 = Open on processor; may be pulled up to TTL VIH (3.3V max) on
baseboard.
2. VID[25mV, 3:0] = ‘11111’ can be used as a ‘No Core’ setting for Pentium
III processor with 512KB L2
Cache platforms to detect the absence of a processor core in a particular PGA370 socket.
The VID pins should be pulled up to a 3.3V level. This may be accomplished with pull-ups internal
to the voltage regulator, which ensures valid VID pull-up voltage during power-up and power-
down sequences. If external resistors are used for the VID[3:0, 25mV] signal, then the power
source must be guaranteed to be stable whenever the supply to the voltage regulator is stable. This
will prevent the possibility of the processor supply going above the specified VCCCORE in the event
of a failure in the supply for the VID lines. In the case of a DC-to-DC converter, this can be
accomplished by using the input voltage to the converter for the VID line pull-ups. A resistor equal
to 1 K Ohms may be used to connect the VID signals to the voltage regulator input.
Table 3.
Voltage Identification Definition 1
VID25mV
VID3
VID2
VID1
VID0
VccCORE
00100
1.05
10100
1.075
00011
1.10
10011
1.125
00010
1.15
10010
1.175
00001
1.20
10001
1.225
00000
1.25
10000
1.275
01111
1.30
11111
1.3252
01110
1.35
11110
1.375
01101
1.40
11101
1.425
01100
1.45
11100
1.475
01011
1.50
11011
1.525
01010
1.55
11010
1.575
01001
1.60
11001
1.625
01000
1.65
11000
1.675
00111
1.70
10111
1.725
00110
1.75
10110
1.775
00101
1.80
10101
1.825
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