
Datasheet
3
Intel Pentium III Processor with 512KB L2 Cache at 1.13GHz to 1.40GHz
Contents
Introduction ..................................................................................................................1 Terminology........................................................................................................... 2
Package and Processor Terminology ...................................................... 2
Processor Naming Convention................................................................. 3
Electrical Specifications..........................................................................................5 Processor System Bus and VREF ............................................................................................ 5 Clock Control and Low Power States.................................................................... 6
Normal State—State 1 ............................................................................. 7
AutoHALT Powerdown State—State 2..................................................... 7
Stop-Grant State—State 3 ....................................................................... 8
HALT/Grant Snoop State—State 4 .......................................................... 8
Sleep State—State 5................................................................................ 8
Deep Sleep State—State 6 ...................................................................... 9
Clock Control............................................................................................ 9
Power and Ground Pins ...................................................................................... 10
Decoupling Guidelines ........................................................................................ 11
Processor VCCCORE Decoupling............................................................11
Processor System Bus Clock and Processor Clocking ....................................... 11
Voltage Identification ........................................................................................... 12
Processor System Bus Unused Pins................................................................... 15
Processor System Bus Signal Groups ................................................................ 15
Asynchronous vs. Synchronous for System Bus Signals ....................... 16
System Bus Frequency Select Signals ..................................................17
............................................................................................... Maximum Ratings18
Processor Voltage Level Specifications .............................................................. 18
AGTL System Bus Specifications........................................................................ 24
System Bus Timing Specifications ...................................................................... 24
Signal Quality Specifications ..............................................................................37 BCLK/BCLK# & PICCLK Signal Quality Specifications and Measurement Guide-
lines37
AGTL Signal Quality Specifications and Measurement Guidelines..................... 38
AGTL Signal Quality Specifications and Measurement Guidelines..................... 39
Overshoot/Undershoot Guidelines ......................................................... 39
Overshoot/Undershoot Magnitude ......................................................... 40
Overshoot/Undershoot Pulse Duration................................................... 40
Activity Factor .........................................................................................40
Reading Overshoot/Undershoot Specification Tables............................ 41
Determining if a System Meets the Overshoot/Undershoot Specifications
42
Non-AGTL Signal Quality Specifications and Measurement Guidelines............. 44
Overshoot/Undershoot Guidelines ......................................................... 44
Ringback Specification ........................................................................... 45
Settling Limit Guideline........................................................................... 45