參數(shù)資料
型號: 5962D1022901QXC
元件分類: DRAM
英文描述: 64M X 40 SYNCHRONOUS DRAM, 5.4 ns, CQFP128
封裝: CERAMIC, QFP-128
文件頁數(shù): 9/68頁
文件大?。?/td> 1475K
代理商: 5962D1022901QXC
17
LOAD MODE REGISTER
The mode register is loaded via inputs A0–A11 (A12 should be driven LOW). See “Mode Register” on page 13. The LOAD MODE
REGISTER command can only be issued when all banks are idle and a subsequent executable command cannot be issued until
t
MRD is met.
ACTIVE
The ACTIVE command is used to open (or activate) a row in a particular bank for a subsequent access. The value on the BA0, BA1
inputs selects the bank and the address provided on inputs A0–A12 selects the row. This row remains active (or open) for accesses
until a PRECHARGE command is issued to that bank. A PRECHARGE command must be issued before opening a different row in
the same bank.
READ
The READ command is used to initiate a burst read access to an active row. The value on the BA0, BA1 inputs selects the bank and
the address provided on inputs; A0–A9, A11 selects the starting column location. The value on input A10 determines whether auto
precharge is used. If auto precharge is selected, the row being accessed will be precharged at the end of the READ burst; if auto
precharge is not selected, the row remains open for subsequent accesses. Read data appears on the DQs subject to the logic level on
the DQM inputs two clocks earlier. If a given DQM signal was registered HIGH, the corresponding DQs will be High-Z two clocks
later; if the DQM signal was registered LOW, the DQs provides valid data.
WRITE
The WRITE command is used to initiate a burst write access to an active row. The value on the BA0, BA1 inputs selects the bank,
and the address provided on inputs A0–A9, A11 selects the starting column location. The value on input A10 determines whether
auto precharge is used. If auto precharge is selected, the row being accessed will be precharged at the end of the WRITE burst; if
auto precharge is not selected, the row remains open for subsequent accesses. Input data appearing on the DQs is written to the
memory array subject to the DQM input logic level appearing coincident with the data. If a given DQM signal is registered LOW,
the corresponding data will be written to memory; if the DQM signal is registered HIGH, the corresponding data inputs will be
ignored and a WRITE will not be executed to that byte/column location.
PRECHARGE
The PRECHARGE command is used to deactivate the open row in a particular bank or the open row in all banks. The bank(s) will
be available for a subsequent row access at a specified time (tRP) after the PRECHARGE command is issued. Input A10 determines
whether one or all banks are to be precharged, and in the case where only one bank is to be precharged, inputs BA0, BA1 select the
bank. Otherwise BA0, BA1 are treated as “Don’t Care.” After a bank has been precharged, it is in the idle state and must be
activated prior to any READ or WRITE commands being issued to that bank.
Auto Precharge
Auto precharge is a feature that performs the same individual-bank PRECHARGE function described above, without requiring an
explicit command. This is accomplished by using A10 to enable auto precharge in conjunction with a specific READ or WRITE
command. A PRECHARGE of the bank/row that is addressed with the READ or WRITE command is automatically performed
upon completion of the READ or WRITE burst, except in the full-page burst mode, where auto precharge does not apply. Auto
precharge is non-persistent in that it is either enabled or disabled for each individual READ or WRITE command.
Auto precharge ensures that the precharge is initiated at the earliest valid stage within a burst. The user must not issue another
command to the same bank until the precharge time (tRP) is completed. This is determined as if an explicit PRECHARGE
command was issued at the earliest possible time, as described for each burst type in the Operations section.
BURST TERMINATE
The BURST TERMINATE command is used to truncate either fixed-length or full-page bursts. The most recently registered READ
or WRITE command prior to the BURST TERMINATE command will be truncated, as shown in the “Operations” section on
page 17. The BURST TERMINATE command does not precharge the row; the row will remain open until a PRECHARGE
相關(guān)PDF資料
PDF描述
5962F0253401VXC 2.5 V FIXED POSITIVE REGULATOR, CDFP16
L491333DIE2V 3.3 V FIXED POSITIVE REGULATOR, UUC
5962F9654403QXA OTHER DECODER/DRIVER, CDFP16
5962F9657601QCX AC SERIES, 4-BIT LOOK-AHEAD CARRY GENERATOR, TRUE OUTPUT, CDIP16
5962F9657701VXC ACT SERIES, 4-BIT LOOK-AHEAD CARRY GENERATOR, TRUE OUTPUT, CDFP16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
5962D9563201VXC 制造商:STMicroelectronics 功能描述:RS-432LINE DRIVERQUADFLAT16, GOLD - Bulk
5962D9666301VXC 制造商:STMicroelectronics 功能描述:RS-432LINE DRIVERQUADFLAT16, GOLD - Bulk
5962F0052301QXC 制造商:Intersil Corporation 功能描述:
5962F0052301VXC 制造商:Intersil Corporation 功能描述:
5962F0151001VXC 制造商:Intersil Corporation 功能描述:RAD SEU HARD QUAD COMPARATOR, CLASS V - Bulk