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參數(shù)資料
| 型號(hào)： | 5962D1022901QXC |
| 元件分類： | DRAM |
| 英文描述： | 64M X 40 SYNCHRONOUS DRAM, 5.4 ns, CQFP128 |
| 封裝： | CERAMIC, QFP-128 |
| 文件頁(yè)數(shù)： | 13/68頁(yè) |
| 文件大?。?/td> | 1475K |
| 代理商： | 5962D1022901QXC |
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20
READs
READ bursts are initiated with a READ command, as shown in Figure 8.
The starting column and bank addresses are provided with the READ command, and auto precharge either is enabled or disabled for
that burst access. If auto precharge is enabled, the row being accessed is precharged at the completion of the burst. For the generic
READ commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address will be available following CL after the READ
command. Each subsequent data-out element will be valid by the next positive clock edge. Figure 9 on page 20 shows general timing
for each possible CL setting.
A subsequent ACTIVE command to another bank can be issued while the first bank is being accessed, which results in a reduction of
total row-access overhead. The minimum time interval between successive ACTIVE commands to different banks is defined by
t
RRD.
Figure 8: READ Command
Column Address
Bank Address
Enable Auto Precharge
Disable Auto Precharge
CLK
CKE
CS#
RAS#
CAS#
WE#
A0-A9, A11
A12
A10
BA(0,1)
Don’t Care
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