參數(shù)資料
型號： XRT72L74
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 95/104頁
文件大?。?/td> 1301K
代理商： XRT72L74
á
XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
PRELIMINARY
REV. P1.0.0
95
T
ABLE
111:
T
X
UTOPIA I
NTERRUPT
/S
TATUS
R
EGISTER
R
EGISTER
110 T
X
UTOPIA I
NTERRUPT
/S
TATUS
R
EGISTER
H
EX
A
DDRESS
: 0
X
6E
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Tx FIFO Reset
R/W
0
0 to 1 transition resets internal FIFO memory and its read-write pointers.
N
OTE
:
This bit-field is only active if the XRT72L74 is configured to operate
in the “ATM UNI” Mode.
6
Discard Upon PErr
R/W
0
0: “Transmit UTOPIA” Parity errors do not result in cell discard
1: Cells in which a “Transmit UTOPIA” parity error is detected are discarded.
N
OTE
:
This bit-field is only active if the XRT72L74 is configured to operate
in the “ATM UNI” Mode.
5
Tx Parity Error Interrupt
Enable
R/W
0
0: Disables the “Transmit UTOPIA Detection of Parity Error” Interrupt.
1: Enables the “Transmit UTOPIA Detection of Parity Error” Interrupt.
N
OTE
:
This bit-field is only active if the XRT72L74 is configured to operate
in the “ATM UNI” Mode.
4
Tx FIFO Overrun Interrupt
Enable
R/W
0
0: Disables the “TxFIFO Overrun” interrupt.
1: Enables the “TxFIFO Overrun” interrupt.
N
OTE
:
This bit-field is only active if the XRT72L74 is configured to operate
in the “ATM UNI” Mode.
3
TC Out of Cell Alignment
Interrupt Enable
R/W
0
0: Disables the “Detection of TxRUNT Cell” interrupt.
1: Enables the “Detection of TxRUNT Cell” interrupt.
N
OTE
:
This bit-field is only active if the XRT72L74 is configured to operate
in the “ATM UNI” Mode.
2
TP Error Interrupt Status
RUR
0
0: Indicates that the “Detection of Transmit UTOPIA - Parity Error” Interrupt
has NOT occurred since the last read of this register.
1: Indicates that the “Detection of Transmit UTOPIA - Parity Error” Interrupt
has occurred since the last read of this register.
N
OTE
:
This bit-field is only active if the XRT72L74 is configured to operate
in the “ATM UNI” Mode.
1
Tx FIFO Interrupt Status
RUR
0
0: Indicates that the “TxFIFO Overrun” Interrupt has NOT occurred since the
last read of this register.
1: Indicates that the “TxFIFO Overrun” Interrupt has occurred since the last
read of this register.
N
OTE
:
This bit-field is only active if the XRT72L74 is configured to operate
in the “ATM UNI” Mode.
0
TC OCA Interrupt Status
RUR
0
0: Indicates that the “Detection of TxRUNT Cell” Interrupt has NOT occurred
since the last read of this register.
1: Indicates that the “Detection of TxRUNT Cell” Interrupt has occurred since
the last read of this register.
N
OTE
:
This bit-field is only active if the XRT72L74 is configured to operate
in the “ATM UNI” Mode.
T
ABLE
112:
F
UTURE
U
SE
R
EGISTER
111 F
UTURE
U
SE
H
EX
A
DDRESS
: 0
X
6F
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
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