參數(shù)資料
型號(hào)： XRT72L74
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 28/104頁
文件大小： 1301K
代理商： XRT72L74
XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
REV. P1.0.0
á
PRELIMINARY
28
Tx Cell Processor
AC16
AE17
AF17
AF18
TxCellTxed_0
TxCellTxed_1
TxCellTxed_2
TxCellTxed_3
O
Transmit Cell Processor—Cell Transmitted Indicator:
This output pin pulses “High” each time the Transmit Cell Processor transmits a
cell to the Transmit PLCP Processor (or Transmit DS3 Framer).
This output pin is only active if the XRT72L74 has been configured to operate in
the “ATM UNI” Mode.
Transmit GFC Nibble-Field Serial Input Port:
This signal, along with TxGFCClk and TxGFCMSB combine to function as the
“Transmit GFC Nibble-field” serial input port. The user will specify the value of the
GFC field, within a given ATM cell, by serial transmitting its four bit value into this
input. Each of these four bits will be clocked into the UNI via rising edge of the
TxGFCClk clock output signal.
N
OTE
:
The user should tie this input pin to “GND” whenever the XRT72L74 has
been configured to operate in the “Clear-Channel-Framer” Mode.
Transmit GFC Nibble Field Serial Input Port Clock:
This signal, along with TxGFC, and TxGFCMSB combine to function as the “Trans-
mit GFC Nibble-field” serial input port. The “Transmit GFC Nibble-field” serial input
port uses this output clock signal to sample the values applied to the TxGFC pin,
on its rising edge. This pin will provide four rising edges for each cell being trans-
mitted.
N
OTE
:
This output pin is only active whenever the XRT72L74 has been configured
to operate in the “ATM UNI” Mode.
Transmit GFC Nibble-Field Serial Input Port—MSB Indicator:
This signal, along with TxGFC and TxGFCClk combine to function as the “Transmit
GFC Nibble Field” serial input port. This output signal will pulse “High” when the
MSB (most significant bit) of the GFC Nibble (for a given cell) is expected at the
TxGFC input pin.
N
OTE
:
This output pin is only active whenever the XRT72L74 has been configured
to operate in the “ATM UNI” Mode.
AD7
AE7
AF7
AE8
TxGFC_0
TxGFC_1
TxGFC_2
TxGFC_3
I
AF5
AE6
AF6
AC6
TxGFCClk_0
TxGFCClk_1
TxGFCClk_2
TxGFCClk_3
O
AF8
AE9
AF9
AE10
TxGFCMSB_0
TxGFCMSB_1
TxGFCMSB_2
TxGFCMSB_3
O
Rx Cell Processor
AD19
AE19
AF19
AD20
RxCellRxed_0
RxCellRxed_1
RxCellRxed_2
RxCellRxed_3
O
Receive Cell Processor—Cell Received Indicator:
This output pin pulses “High” each time the Receive Cell Processor receives a new
cell from the Receive PLCP Processor or the Receive DS3 Framer.
N
OTE
:
This output pin is only active if the XRT72L74 has been configured to oper-
ate in the “ATM UNI” Mode.
Receive GFC Nibble Field Serial Output pin:
This pin, along with the RxGFCClk and the RxGFCMSB pins form the “Receive
GFC Nibble-Field” serial output port. This pin will serially output the contents of the
GFC Nibble field of each cell that is processed through the Receive Cell Proces-
sor. This data is serially clocked out of this pin on the rising edge of the RxGFCClk
signal. The Most Significant Bit (MSB) of each GFC value is designated by a pulse
at the RxGFCMSB output pin.
N
OTE
:
This output pin is only active if the XRT72L74 has been configured to oper-
ate in the “ATM UNI” Mode.
AF23
AF25
AD26
AC25
RxGFC_0
RxGFC_1
RxGFC_2
RxGFC_3
O
Y24
Y25
Y26
Y23
RxGFCClk_0
RxGFCClk_1
RxGFCClk_2
RxGFCClk_3
O
Received GFC Nibble Serial Output Port Clock Signal:
This output pin functions as a part of the “Receive GFC Nibble-Field” Serial Output
Port; also consisting of the RxGFC and RxGFCMSB pins. This pin provides a
clock pulse which allows external circuitry to latch in the GFC Nibble-Data via the
RxGFC output pin.
N
OTE
:
This output pin is only active if the XRT72L74 has been configured to oper-
ate in the “ATM UNI” Mode.
PIN DESCRIPTIONS
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
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