參數(shù)資料
型號(hào)： XRT72L74
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁(yè)數(shù)： 73/104頁(yè)
文件大小： 1301K
代理商： XRT72L74
á
XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
PRELIMINARY
REV. P1.0.0
73
T
ABLE
53:
PMON R
ECEIVE
V
ALID
C
ELL
C
OUNT
- MSB
R
EGISTER
52 PMON R
ECEIVE
V
ALID
C
ELL
C
OUNT
- MSB H
EX
A
DDRESS
: 0
X
34
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Rx Valid Cell Count High-
byte
RUR
0x00
This Reset-upon-Read register, along with PMON Receive Valid Cell Count -
LSB” contains the 16 bit value for the total number of Valid Cells that have
been received since the last read of this register. This register contains the
“High” byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
54:
PMON R
ECEIVE
V
ALID
C
ELL
C
OUNT
- LSB
R
EGISTER
53 PMON R
ECEIVE
V
ALID
C
ELL
C
OUNT
- LSB H
EX
A
DDRESS
: 0
X
35
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Rx Valid Cell Count Low-
byte
RUR
0x00
This Reset-upon-Read register, along with PMON Receive Valid Cell Count -
MSB” contains the 16 bit value for the total number of Valid Cells that have
been received since the last read of this register. This register contains the
“Low” byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
55:
PMON D
ISCARDED
C
ELL
C
OUNT
- MSB
R
EGISTER
54 PMON D
ISCARDED
C
ELL
C
OUNT
- MSB H
EX
A
DDRESS
: 0
X
36
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Cell Drop Count High-byte
RUR
0x00
This Reset-upon-Read register, along with PMON Discarded Cell Count -
LSB” contains the 16 bit value for the total number of cells that have been
discarded since the last read of this register. This register contains the
“High” byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
56:
PMON D
ISCARDED
C
ELL
C
OUNT
- LSB
R
EGISTER
55 PMON D
ISCARDED
C
ELL
C
OUNT
- LSB H
EX
A
DDRESS
: 0
X
37
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Cell Drop Count Low-byte
RUR
0x00
This Reset-upon-Read register, along with PMON Discarded Cell Count -
MSB” contains the 16 bit value for the total number of cells that have been
discarded since the last read of this register. This register contains the “Low”
byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
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